參數(shù)資料
型號： IDT70V9289L9PRF8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： SRAM
英文描述： 64K X 16 DUAL-PORT SRAM, 20 ns, PQFP128
封裝： TQFP-128
文件頁數(shù)： 17/19頁
文件大?。?/td> 211K
代理商： IDT70V9289L9PRF8
6.42
IDT70V9389/289L
High-Speed 3.3V 64K x18/x16 Dual-Port Synchronous Pipelined Static RAM
Industrial & Commercial Temperature Ranges
7
RecommendedOperating
Temperature and Supply Voltage(1)
Recommended DC Operating
Conditions
Absolute Maximum Ratings(1)
NOTES:
1.
These parameters are determined by device characterization, but are not
production tested.
2. 3dV references the interpolated capacitance when the input and output switch
from 0V to 3V or from 3V to 0V.
3. COUT also references CI/O.
Capacitance(1)
(TA = +25°C, f = 1.0MHZ)
Truth Table II—Address Counter Control(1,2)
NOTES:
1. "H" = VIH, "L" = VIL, "X" = Don't Care.
2.
CE0, LB, UB, and OE = VIL; CE1 and R/W = VIH.
3. Outputs configured in Flow-Through Output mode; if outputs are in Pipelined mode the data out will be delayed by one cycle.
4.
ADS and CNTRST are independent of all other signals including CE0, CE1, UB and LB.
5. The address counter advances if
CNTEN = VIL on the rising edge of CLK, regardless of all other signals including CE0, CE1, UB and LB.
NOTES:
1. VIL > -1.5V for pulse width less than 10 ns.
2. VTERM must not exceed VDD +0.3V.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed VDD +0.3V for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of VTERM > VDD + 0.3V.
3. Ambient Temperature Under DC Bias. No AC Conditions. Chip Deselected.
NOTES:
1. This is the parameter TA. This is the "instant on" case temperature.
External
Address
Previous
Internal
Address
Internal
Address
Used
CLK
ADS
CNTEN
CNTRST
I/O
(3)
MODE
XX
0
↑
XX
L(4)
DI/O(0)
Counter Reset to Address 0
An
X
An
↑
L(4)
XH
DI/O(n)
External Address Loaded into Counter
An
Ap
↑
HH
HDI/O(p)
External Address Blocked—Counter disabled (Ap reused)
XAp
Ap + 1
↑
H
L
(5)
HDI/O(p+1)
Counter Enabled—Internal Address generation
4856 tbl 03
Grade
Ambient
Temperature
(2)
GND
VDD
Commercial
0OC to +70OC0V
3.3V
+ 0.3V
Industrial
-40OC to +85OC0V
3.3V
+ 0.3V
4856 tbl 04
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
Supply Voltage
3.0
3.3
3.6
V
VSS
Ground
0
V
VIH
Input High Voltage
2.0
____
VDD+0.3V(2)
V
VIL
Input Low Voltage
-0.3(1)
____
0.8
V
4856 tbl 05
Symbol
Rating
Commercial
& Industrial
Unit
VTERM(2)
Terminal Voltage
with Respect to
GND
-0.5 to +4.6
V
TBIAS(3)
Temperature
Under Bias
-55 to +125
oC
TSTG
Storage
Temperature
-65 to +150
oC
TJN
Junction Temperature
+150
oC
IOUT
DC Output Current
50
mA
4856 tbl 06
Symbol
Parameter
Conditions(2)
Max.
Unit
CIN
Input Capacitance
VIN = 3dV
9
pF
COUT(3)
Output Capacitance
VOUT = 3dV
10
pF
4856 tbl 07
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