參數(shù)資料
型號(hào)： IDT70V7319S166BF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： DRAM
英文描述： Photoelectric Sensor; Sensor Input Type:Optical; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:1ms; Turn On Time:1ms; Range:12" using 90% reflectance white card
中文描述： 256K X 18 DUAL-PORT SRAM, 12 ns, PBGA208
封裝： FBGA-208
文件頁(yè)數(shù)： 14/22頁(yè)
文件大?。?/td> 621K
代理商： IDT70V7319S166BF
6.42
14
IDT70V7319S
High-Speed 256K x 18 Synchronous Bank-Switchable Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Timing Waveform of Port A Write to Pipelined Port B Read
(1,2,4)
CLK
"A"
R/
W
"A"
BANK ADDRESS
AND ADDRESS
"A"
DATA
IN"A"
CLK
"B"
R/
W
"B"
BANK ADDRESS
AND ADDRESS
"B"
DATA
OUT"B"
t
SW
t
HW
t
SA
t
HA
t
SD
t
HD
t
SW
t
HW
t
SA
t
HA
t
CD2
Dn
An
An
Dn
5629 drw 10
t
DC
t
CO
(3)
Timing Waveform with Port-to-Port Flow-Through Read
(1,2,4)
DATA
IN "A"
CLK
"B"
R/
W
"B"
BANK ADDRESS
AND ADDRESS
"A"
R/
W
"A"
CLK
"A"
BANK ADDRESS
AND ADDRESS
"B"
An
An
Dn
t
DC
DATA
OUT "B"
5622 drw 11
Dn
t
SW
t
HW
t
SA
t
HA
t
SD
t
HD
t
HW
t
HA
t
CD1
t
CO
(3)
t
DC
t
SA
t
SW
NOTES:
1.
CE
0
,
BE
n, and
ADS
= V
IL
; CE
1
,
CNTEN
, and
REPEAT
= V
IH
.
2.
OE
= V
IL
for the Right Port, which is being read from
OE
= V
IH
for the Left Port, which is being written to.
3. If t
CO
< mnimumspecified, then operations fromboth ports are INVALID. If t
CO
≥
mnimum then data fromPort "B" read is available on first Port "B" clock cycle
(i.e., time fromwrite to valid read on opposite port will be t
CO
+ t
CD1
).
4. All timng is the same for both left and right ports. Port "A" may be either left or right port. Port "B" is the opposite of Port "A".
NOTES:
1.
CE
0
,
BE
n, and
ADS
= V
IL
; CE
1
,
CNTEN
, and
REPEAT
= V
IH
.
2.
OE
= V
IL
for the Right Port, which is being read from
OE
= V
IH
for the Left Port, which is being written to.
3. If t
CO
< mnimumspecified, then operations fromboth ports are INVALID. If t
CO
≥
mnimum then data fromPort "B" read is available on first Port "B" clock cycle
(ie, time fromwrite to valid read on opposite port will be t
CO
+ t
CYC2
+ t
CD2
).
4. All timng is the same for both left and right ports. Port "A" may be either left or right port. Port "B" is the opposite of Port "A".
相關(guān)PDF資料
PDF描述
IDT70V7319S166BFI Photoelectric Sensor; Sensor Input Type:Optical; Sensing Range Max:24"; Sensor Housing:Rectangular; Turn Off Time:1ms; Turn On Time:1ms; Range:24"
IDT70V7319S166DD Photoelectric Sensor; Sensor Input Type:Optical; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:10ms; Turn On Time:10ms; Range:6-ft using 90% reflectance white card
IDT70V7319S166DDI Photoelectric Sensor; Sensor Input Type:Optical; Sensing Range Max:45m; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:1ms; Turn On Time:1ms
IDT70V7319S200BC Photoelectric Sensor; Sensor Input Type:Optical; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:10ms; Turn On Time:10ms; Range:700-ft with SBRX1 Receiver
IDT70V7319S200BCI HIGH-SPEED 3.3V 256K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
相關(guān)代理商/技術(shù)參數(shù)
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