參數(shù)資料
型號(hào)： IDT70V7319S166BF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： DRAM
英文描述： Photoelectric Sensor; Sensor Input Type:Optical; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:1ms; Turn On Time:1ms; Range:12" using 90% reflectance white card
中文描述： 256K X 18 DUAL-PORT SRAM, 12 ns, PBGA208
封裝： FBGA-208
文件頁數(shù)： 1/22頁
文件大小： 621K
代理商： IDT70V7319S166BF
2002 Integrated Device Technology, Inc.
DECEMBER 2002
DSC 5629/6
1
Functional Block Diagram
Features:
◆
256K x 18 Synchronous Bank-Switchable Dual-ported
SRAMArchitecture
–
64 independent 4K x 18 banks
– 4 megabits of memory on chip
◆
Bank access controlled via bank address pins
◆
High-speed data access
– Commercial: 3.4ns (200MHz)/3.6ns (166MHz)/
4.2ns (133MHz) (max.)
– Industrial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
◆
Selectable Pipelined or Flow-Through output mode
◆
Counter enable and repeat features
◆
Dual chip enables allow for depth expansion without
additional logic
◆
Full synchronous operation on both ports
– 5ns cycle time, 200MHz operation (14Gbps bandwidth)
– Fast 3.4ns clock to data out
– 1.5ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 200MHz
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
◆
Separate byte controls for multiplexed bus and bus
matching compatibility
◆
LVTTL- compatible, 3.3V (±150mV) power supply
for core
◆
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on
each port
◆
Industrial temperature range (-40°C to +85°C) is
available at 166MHz and 133MHz
◆
Available in a 144-pin Thin Quad Flatpack (TQFP),
208-pin fine pitch Ball Grid Array (fpBGA), and 256-pin Ball
Grid Array (BGA)
◆
Supports JTAG features compliant with IEEE 1149.1
–
D
ue to limted pin count, JTAG is not supported on the
144-pin TQFP package.
HIGH-SPEED 3.3V 256K x 18
SYNCHRONOUS
BANK-SWITCHABLE
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
IDT70V7319S
4Kx18
MEMORY
ARRAY
(BANK 63)
MUX
MUX
PL/
FT
L
OPT
L
CLK
L
ADS
L
CNTEN
L
REPEAT
L
R/
W
L
CE
0L
CE
1L
UB
L
LB
L
OE
L
I/O
0L-17L
A
11L
A
0L
BA
5L
BA
4L
BA
3L
BA
2L
BA
1L
BA
0L
JTAG
4Kx18
MEMORY
ARRAY
(BANK 1)
MUX
MUX
4Kx18
MEMORY
ARRAY
(BANK 0)
MUX
MUX
CONTROL
LOGIC
I/O
CONTROL
BANK
DECODE
ADDRESS
DECODE
I/O
0R-17R
A
11R
A
0R
BA
5R
BA
4R
BA
3R
BA
2R
BA
1R
BA
0R
CONTROL
LOGIC
I/O
CONTROL
BANK
DECODE
ADDRESS
DECODE
5629 drw 01
,
PL/
FT
R
OPT
R
CLK
R
ADS
R
CNTEN
R
REPEAT
R
R/
W
R
CE
0R
CE
1R
UB
R
LB
R
OE
R
TMS
TCK
TRST
TDI
TDO
NOTE:
1. The Bank-Switchable dual-port uses a true SRAM
core instead of the traditional dual-port SRAMcore.
As a result, it has unique operating characteristics.
Please refer to the functional description on page 19
for details.
相關(guān)PDF資料
PDF描述
IDT70V7319S166BFI Photoelectric Sensor; Sensor Input Type:Optical; Sensing Range Max:24"; Sensor Housing:Rectangular; Turn Off Time:1ms; Turn On Time:1ms; Range:24"
IDT70V7319S166DD Photoelectric Sensor; Sensor Input Type:Optical; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:10ms; Turn On Time:10ms; Range:6-ft using 90% reflectance white card
IDT70V7319S166DDI Photoelectric Sensor; Sensor Input Type:Optical; Sensing Range Max:45m; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:1ms; Turn On Time:1ms
IDT70V7319S200BC Photoelectric Sensor; Sensor Input Type:Optical; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensor Housing:Rectangular; Turn Off Time:10ms; Turn On Time:10ms; Range:700-ft with SBRX1 Receiver
IDT70V7319S200BCI HIGH-SPEED 3.3V 256K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
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