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參數(shù)資料
| 型號： | IDT70V24S15J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM |
| 中文描述： | 4K X 16 DUAL-PORT SRAM, 15 ns, PQCC84 |
| 封裝： | 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 |
| 文件頁數(shù)： | 11/22頁 |
| 文件大小： | 191K |
| 代理商： | IDT70V24S15J |
6.42
IDT70V24S/L
High-Speed 4K x 16 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
%-9-1"$,
W
+%
5>!
NOTES:
1. R/
W
or
CE
or
UB
&
LB
must be high during all address transitions.
2. A write occurs during the overlap (t
EW
or t
WP
) of a low
UB
or
LB
and a LOW
CE
and a LOW R/
W
for memory array writing cycle.
3. t
WR
is measured fromthe earlier of
CE
or R/
W
(or
SEM
or R/
W
) going HIGH to the end of write cycle.
4. During this period, the I/O pins are in the output state and input signals must not be applied.
5. If the
CE
or
SEM
LOW transition occurs simultaneously with or after the R/
W
LOW transition, the outputs remain in the high-impedance state.
6. Timng depends on which enable signal is asserted last,
CE
, R/
W
or byte control.
7. This parameter is guaranteed by device characterization, but is not production tested.Transition is measured 0mV fromlow or high-impedance voltage with Output
Test Load (Figure 2).
8. If
OE
is LOW during R/
W
controlled write cycle, the write pulse width must be the larger of t
WP
or (t
WZ
+ t
DW
) to allow the I/O drivers to turn off and data to be placed on the
bus for the required t
DW
. If
OE
is HIGH during an R/
W
controlled write cycle, this requirement does not apply and the write pulse can be as short as the specified t
WP
.
9. To access SRAM
CE
= V
IL
,
UB
or
LB
= V
IL
,
SEM
= V
IH
. To access semaphore,
CE
= V
IH
or
UB
and
LB
= V
IH
and
SEM
= V
IL
. Either condition must be valid for
the entire t
EW
time.
R/
t
WC
t
HZ
t
AW
t
WR
t
AS
t
WP
DATA
OUT
(2)
t
WZ
t
DW
t
DH
t
OW
ADDRESS
DATA
IN
(6)
(4)
(4)
(7)
or
2911 drw 08
(9)
or
(9)
(7)
(3)
2911 drw 09
t
WC
t
AS
t
WR
t
DW
t
DH
ADDRESS
DATA
IN
R/
t
AW
t
EW
or
(3)
(2)
(6)
or
(9)
(9)
%-9-1"$
CE UB LB
+%
5!
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| IDT70V24S15JI | HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM |
| IDT70V24S15PF | HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM |
| IDT70V24S15PFI | HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM |
| IDT70V24S20G | HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM |
| IDT70V24S20GI | HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM |
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| IDT70V24S15J8 | 功能描述:IC SRAM 64KBIT 15NS 84PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，異步 存儲容量:128K（8K x 16） 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:70V25S15PF |
| IDT70V24S15PF | 功能描述:IC SRAM 64KBIT 15NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，異步 存儲容量:128K（8K x 16） 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:70V25S15PF |
| IDT70V24S15PF8 | 功能描述:IC SRAM 64KBIT 15NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:72 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步 存儲容量:9M（256K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:71V67703S75PFGI |
| IDT70V24S15PFG | 制造商:Integrated Device Technology Inc 功能描述: |
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