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參數(shù)資料
| 型號(hào)： | IDT70T653MS15BCI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | HIGH-SPEED 2.5V 512K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE |
| 中文描述： | 高速2.5V的為512k × 36 3.3 5011 2.5V的接口ASYNCHRONO美國雙端口靜態(tài)RAM |
| 文件頁數(shù)： | 5/24頁 |
| 文件大小： | 309K |
| 代理商： | IDT70T653MS15BCI |
5
IDT70T653M Preliminary
High-Speed 2.5V 512K x 36 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Truth Table I—Read/Write and Enable Control
(1,2)
Byte 3
I/O
27-35
NOTES:
1. "H" = V
IH,
"L" = V
IL,
"X" = Don't Care.
2. It is possible to read or write any combination of bytes during a given access. A few representative samples have been illustrated here.
OE
SEM
CE
0
CE
1
BE
3
BE
2
BE
1
BE
0
R/
W
ZZ
Byte 2
I/O
18-26
Byte 1
I/O
9-17
Byte 0
I/O
0-8
MODE
X
H
H
X
X
X
X
X
X
L
High-Z
High-Z
High-Z
High-Z
Deselected–Power Down
X
H
X
L
X
X
X
X
X
L
High-Z
High-Z
High-Z
High-Z
Deselected–Power Down
X
H
L
H
H
H
H
H
X
L
High-Z
High-Z
High-Z
High-Z
All Bytes Deselected
X
H
L
H
H
H
H
L
L
L
High-Z
High-Z
High-Z
D
IN
Write to Byte 0 Only
X
H
L
H
H
H
L
H
L
L
High-Z
High-Z
D
IN
High-Z
Write to Byte 1 Only
X
H
L
H
H
L
H
H
L
L
High-Z
D
IN
High-Z
High-Z
Write to Byte 2 Only
X
H
L
H
L
H
H
H
L
L
D
IN
High-Z
High-Z
High-Z
Write to Byte 3 Only
X
H
L
H
H
H
L
L
L
L
High-Z
High-Z
D
IN
D
IN
Write to Lower 2 Bytes Only
X
H
L
H
L
L
H
H
L
L
D
IN
D
IN
High-Z
High-Z
Write to Upper 2 bytes Only
X
H
L
H
L
L
L
L
L
L
D
IN
D
IN
D
IN
D
IN
Write to All Bytes
L
H
L
H
H
H
H
L
H
L
High-Z
High-Z
High-Z
D
OUT
Read Byte 0 Only
L
H
L
H
H
H
L
H
H
L
High-Z
High-Z
D
OUT
High-Z
Read Byte 1 Only
L
H
L
H
H
L
H
H
H
L
High-Z
D
OUT
High-Z
High-Z
Read Byte 2 Only
L
H
L
H
L
H
H
H
H
L
D
OUT
High-Z
High-Z
High-Z
Read Byte 3 Only
L
H
L
H
H
H
L
L
H
L
High-Z
High-Z
D
OUT
D
OUT
Read Lower 2 Bytes Only
L
H
L
H
L
L
H
H
H
L
D
OUT
D
OUT
High-Z
High-Z
Read Upper 2 Bytes Only
L
H
L
H
L
L
L
L
H
L
D
OUT
D
OUT
D
OUT
D
OUT
Read All Bytes
H
H
L
H
L
L
L
L
X
L
High-Z
High-Z
High-Z
High-Z
Outputs Disabled
X
X
X
X
X
X
X
X
X
H
High-Z
High-Z
High-Z
High-Z
High-Z Sleep Mode
5679 tbl 02
Truth Table II – Semaphore Read/Write Control
(1)
Inputs
(1)
NOTES:
1. There are eight semaphore flags written to I/O
0
and read from the I/Os (I/O
0
-I/O
08
and
I/O
18
-I/O
26
). These eight semaphore flags are addressed by A
0
-A
2
.
2.
CE
= L occurs when
CE
0
= V
IL
and CE
1
= V
IH
.
CE
= H when
CE
0
= V
IH
and/or CE
1
= V
IL
.
3. Each byte is controlled by the respective
BE
n. To read data
BE
n = V
IL
.
Outputs
Mode
CE
(2)
R/
W
OE
BE
3
BE
2
BE
1
BE
0
SEM
I/O
1-8,
I/O
18-26
I/O
0
H
H
L
X
L
X
L
L
DATA
OUT
DATA
OUT
Read Data in Semaphore Flag
(3)
H
↑
X
X
X
X
L
L
X
DATA
IN
Write I/O
0
into Semaphore Flag
L
X
X
X
X
X
X
L
______
______
Not Allowed
5679 tbl 03
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