參數(shù)資料
型號： IDT70T651S10BF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： DRAM
英文描述： HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE
中文描述： 256K X 36 DUAL-PORT SRAM, 10 ns, PBGA208
封裝： FBGA-208
文件頁數(shù)： 11/15頁
文件大小： 190K
代理商： IDT70T651S10BF
6.42
IDT70V9379L
High-Speed 32K x 18 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
5
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range(3,6) (VCC = 3.3V ± 0.3V)
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VCC = 3.3V ± 0.3V)
NOTE:
1. At Vcc < 2.0V input leakages are undefined.
NOTES:
1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input
levels of GND to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. Vcc = 3.3V, TA = 25°C for Typ, and are not production tested. ICC DC(f=0) = 90mA (Typ).
5.
CEX = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VCC - 0.2V
CEX > VCC - 0.2V means CE0X > VCC - 0.2V or CE1X < 0.2V
"X" represents "L" for left port or "R" for right port.
6. Industrial temperature: for specific speeds, packages and powers contact your sales office.
Symbol
Parameter
Test Conditions
70V9379L
Unit
Min.
Max.
|ILI|
Input Leakage Current(1)
VCC = 3.6V, VIN = 0V to VCC
___
5 A
|ILO|
Output Leakage Current
CE = VIH or CE1 = VIL, VOUT = 0V to VCC
___
5 A
VOL
Output Low Voltage
IOL = +4mA
___
0.4
V
VOH
Output High Voltage
IOH = -4mA
2.4
___
V
4857 tbl 08
70V9379L7
Com'l Only
70V9379L9
Com'l Only
70V9379L12
Com'l Only
Symbol
Parameter
Test Condition
Version
Typ.(4)
Max.
Typ.(4)
Max.
Typ.(4)
Max.
Unit
ICC
Dynamic Operating
Current (Both
Ports Active)
CEL and CER= VIL,
Outputs Disabled,
f = fMAX(1)
COM'L
L
200
310
180
260
150
230
mA
IND
L
____
ISB1
Standby Current
(Both Ports - TTL
Level Inputs)
CEL = CER = VIH
f = fMAX(1)
COM'L
L
65
130
50
100
40
80
mA
IND
L
____
ISB2
Standby
Current (One
Port - TTL
Level Inputs)
CE"A" = VIL and
CE"B" = VIH(5)
Active Port Outputs
Disabled, f=fMAX(1)
COM'L
L
140
245
110
190
100
175
mA
IND
L
____
ISB3
Full Standby
Current (Both
Ports - CMOS
Level Inputs)
Both Ports
CEL and
CER > VCC - 0.2V,
VIN > VCC - 0.2V or
VIN < 0.2V, f = 0(2)
COM'L
L
0.4
3
0.4
3
0.4
3
mA
IND
L
____
ISB4
Full Standby
Current (One
Port - CMOS
Level Inputs)
CE"A" < 0.2V and
CE"B" > VCC - 0.2V(5)
VIN > VCC - 0.2V or
VIN < 0.2V, Active Port,
Outputs Disabled , f = fMAX(1)
COM'L
L
130
235
100
180
90
165
mA
IND
L
____
4857 tbl 09
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