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參數(shù)資料
| 型號(hào)： | IDT709089S12PFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 64K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM |
| 中文描述： | 64K X 8 DUAL-PORT SRAM, 25 ns, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 15/17頁 |
| 文件大?。?/td> | 199K |
| 代理商： | IDT709089S12PFI |
6.42
IDT709089S/L
High-Speed 64K x 8 Synchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Preliminary
3242 drw 19
IDT709089
0
CE
1
CE
1
0
0
CE
1
A
15
CE
1
0
V
CC
V
CC
IDT709089
IDT709089
IDT709089
Control Inputs
Control Inputs
Control Inputs
Control Inputs
CLK
R/
The IDT709089 provides a true synchronous Dual-Port Static
RAM interface. Registered inputs provide mnimal set-up and hold
times on address, data, and all critical control inputs. All internal
registers are clocked on the rising edge of the clock signal, however,
the self-timed internal write pulse is independent of the LOW to HIGH
transition of the clock signal.
An asynchronous output enable is provided to ease asynchronous
bus interfacing. Counter enable inputs are also provided to stall the
operation of the address counters for fast interleaved memory appli-
cations.
A HIGH on
CE
0
or a LOW on CE
1
for one clock cycle will power
down the internal circuitry to reduce static power consumption.
Multiple chip enables allow easier banking of multiple IDT709089's for
depth expansion configurations. When the Pipelined output mode is
enabled, two cycles are required with
CE
0
LOW and CE
1
HIGH to re-
activate the outputs.
%)+)%2
The IDT709089 features dual chip enables (refer to Truth Table I)
in order to facilitate rapid and simple depth expansion with no
requirements for external logic. Figure 4 illustrates how to control the
various chip enables in order to expand two devices in depth.
The 709089 can also be used in applications requiring expanded
width, as indicated in Figure 4. Since the banks are allocated at the
discretion of the user, the external controller can be set up to drive the
input signals for the various devices as required to allow for 16-bit or
wider applications.
Figure 4. Depth and Width Expansion with IDT709089
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參數(shù)描述 |
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| IDT709089S15PF | 功能描述:IC SRAM 512KBIT 15NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口，同步 存儲(chǔ)容量:1.125M（32K x 36） 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA（17x17） 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8 |
| IDT709089S15PF8 | 功能描述:IC SRAM 512KBIT 15NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口，異步 存儲(chǔ)容量:128K（8K x 16） 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:70V25S15PF |
| IDT709089S15PFI | 制造商:Integrated Device Technology Inc 功能描述:Synchronous SRAM, 64K x 8, 100 Pin, Plastic, QFP |
| IDT709089S9PF | 功能描述:IC SRAM 512KBIT 9NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口，同步 存儲(chǔ)容量:1.125M（32K x 36） 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA（17x17） 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8 |
| IDT709089S9PF8 | 功能描述:IC SRAM 512KBIT 9NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口，同步 存儲(chǔ)容量:1.125M（32K x 36） 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA（17x17） 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8 |
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