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參數(shù)資料
| 型號(hào)： | IDT6116LA55TDB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS STATIC RAM 16K (2K x 8 BIT) |
| 中文描述： | 2K X 8 STANDARD SRAM, 55 ns, CDIP24 |
| 封裝： | 0.300 INCH, CERAMIC, DIP-24 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 91K |
| 代理商： | IDT6116LA55TDB |
5.1
6
IDT6116SA/LA
CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
3089 tbl 12
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V
±
10%, All Temperature Ranges) (Continued)
6116SA45
6116LA45
6116SA55
(2)
6116LA55
(2)
6116SA70
(2)
6116SA90
(2)
6116LA70
(2)
6116LA90
(2)
6116SA120
(2)
6116LA120
(2)
6116SA150
(2)
6116LA150
(2)
Symbol
READ CYCLE
t
RC
t
AA
t
ACS
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max. Min.
Max.
Min.
Max.
Unit
Read Cycle Time
Address Access Time
Chip Select Access Time
45
—
—
—
45
45
55
—
—
—
55
50
70
—
—
—
70
65
90
—
—
—
90
90
120
—
—
—
120
120
150
—
—
—
150
150
ns
ns
ns
t
CLZ
(3)
Chip Select to Output in
Low-Z
5
—
5
—
5
—
5
—
5
—
5
—
ns
t
OE
Output Enable to Output
Valid
—
25
—
40
—
50
—
60
—
80
—
100
ns
t
OLZ
(3)
Output Enable to Output
in Low-Z
5
—
5
—
5
—
5
—
5
—
5
—
ns
t
CHZ
(3)
Chip Deselect to Output
in High-Z
—
20
—
30
—
35
—
40
—
40
—
40
ns
t
OHZ
(3)
Output Disable to Output
in High-Z
Output Hold from
Address Change
—
15
—
30
—
35
—
40
—
40
—
40
ns
t
OH
5
—
5
—
5
—
5
—
5
—
5
—
ns
NOTES:
1. 0
°
C to + 70
°
C temperature range only.
2. –55
°
C to + 125
°
C temperature range only.
3. This parameter guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
3089 tbl 13
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V
±
10%, All Temperature Ranges)
6116SA15
(1)
6116LA15
(1)
Symbol
Parameter
Min.
Max.
READ CYCLE
t
RC
Read Cycle Time
15
t
AA
Address Access Time
—
t
ACS
Chip Select Access Time
—
t
CLZ
(3)
Chip Select to Output in
5
Low-Z
t
OE
Output Enable to Output
—
Valid
t
OLZ
(3)
Output Enable to Output
0
in Low-Z
t
CHZ
(3)
Chip Deselect to Output
—
in High-Z
t
OHZ
(3)
Output Disable to Output
—
in High-Z
t
OH
Output Hold from
5
Address Change
t
PU
(3)
Chip Select to Power-Up
0
Time
t
PD
(3)
Chip Deselect to Power-
—
Down Time
6116SA20
6116LA20
Min.
6116SA25
6116LA25
Min.
6116SA35
6116LA35
Min.
Max.
Max.
Max.
Unit
—
15
15
—
20
—
—
5
—
19
20
—
25
—
—
5
—
25
25
—
35
—
—
5
—
35
35
—
ns
ns
ns
ns
10
—
10
—
13
—
20
ns
—
0
—
5
—
5
—
ns
10
—
11
—
12
—
15
ns
8
—
8
—
10
—
13
ns
—
5
—
5
—
5
—
ns
—
0
—
0
—
0
—
ns
15
—
20
—
25
—
35
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT6116LA55TP | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
| IDT6116LA55TPB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
| IDT6116LA55Y | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
| IDT6116LA55YB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
| IDT6116LA70D | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
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