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參數(shù)資料
| 型號： | IDT6116LA55DB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | Enhanced-JFET Low-Power Low-Offset Dual Operational Amplifier 8-SOIC 0 to 70 |
| 中文描述： | 2K X 8 STANDARD SRAM, 55 ns, CDIP24 |
| 封裝： | 0.600 INCH, CERAMIC, DIP-24 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 91K |
| 代理商： | IDT6116LA55DB |
5.1
7
IDT6116SA/LA
CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 2
(1, 2, 4)
TIMING WAVEFORM OF READ CYCLE NO. 1
(1, 3)
TIMING WAVEFORM OF READ CYCLE NO. 3
(1, 3, 4)
NOTES:
1.
WE
is HIGH for Read cycle.
2. Device is continously selected,
CS
is LOW.
3. Address valid prior to or coincident with
CS
transition LOW.
4.
OE
is LOW.
5. Transition is measured
±
500mV from steady state.
CS
t
ACS
DATA
OUT
t
CLZ(5)
t
CHZ(5)
DATA VALID
3089 drw 08
ADDRESS
t
RC
t
AA
t
OH
t
OH
DATA
OUT
3089 drw 07
PREVIOUS DATA VALID
DATA VALID
ADDRESS
OE
CS
t
RC
t
AA
t
OE
t
ACS
t
CLZ(5)
DATA
OUT
t
OH
t
OLZ(5)
t
OHZ(5)
t
CHZ(5)
3089 drw 06
DATA
VALID
t
PD
I
CC
I
SB
t
PU
V
CC
Supply
Currents
相關PDF資料 |
PDF描述 |
|---|---|
| IDT6116LA55P | Enhanced-JFET Low-Power Low-Offset Dual Operational Amplifier 8-SOIC 0 to 70 |
| IDT6116LA55PB | Enhanced-JFET Low-Power Low-Offset Dual Operational Amplifier 8-SOIC 0 to 70 |
| IDT6116SA15D | Quad Enhanced JFET Low-Power Precision Operational Amplifier 14-TSSOP 0 to 70 |
| IDT6116SA15DB | Quad Enhanced JFET Low-Power Precision Operational Amplifier 14-TSSOP 0 to 70 |
| IDT6116SA15P | CMOS STATIC RAM 16K (2K x 8 BIT) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT6116LA55L24B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| IDT6116LA55P | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
| IDT6116LA55PB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
| IDT6116LA55SO | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
| IDT6116LA55SOB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:CMOS STATIC RAM 16K (2K x 8 BIT) |
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