參數(shù)資料
型號(hào)： IDT5T2110
廠商： Integrated Device Technology, Inc.
英文描述： 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER TERACLOCK
中文描述： 零延遲PLL 2.5V的差分時(shí)鐘驅(qū)動(dòng)器TERACLOCK
文件頁數(shù)： 15/23頁
文件大?。?/td> 162K
代理商： IDT5T2110
15
INDUSTRIAL TEMPERATURE RANGE
IDT5T2110
2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER TERACLOCK
S INGLE-ENDED INPUT AC T ES T CONDIT IONS FOR 1.8V LV T T L
Symbol
Parameter
V
IH
Input HIGH Voltage
(1)
V
IL
Input LOW Voltage
V
THI
Input Timng Measurement Reference Level
(2)
t
R
, t
F
Input Signal Edge Rate
(3)
NOTES:
1. V
DDI
is the nomnal 1.8V supply (1.8V ± 0.15V) of the part or source driving the input.
2. A nomnal 900mV timng measurement reference level is specified to allow constant, repeatable results in an automatic test equipment (ATE) environment.
3. The input signal edge rate of 2V/ns or greater is to be maintained in the 10% to 90% range of the input waveform
Value
V
DDI
0
V
DDI
/2
2
Units
V
V
mV
V/ns
DIFFERENT IAL INPUT AC T ES T CONDIT IONS FOR 1.8V LV T T L
Symbol
Parameter
V
DIF
Input Signal Swing
(1)
V
X
Differential Input Signal Crossing Point
(2)
V
THI
Input Timng Measurement Reference Level
(3)
t
R
, t
F
Input Signal Edge Rate
(4)
NOTES:
1. V
DDI
is the nomnal 1.8V supply (1.8V ± 0.15V) of the part or source driving the input. A nomnal 1.8V peak-to-peak input pulse level is specified to allow consistent, repeatable
results in an automatic test equipment (ATE) environment. This device meets the V
DIF
(AC) specification under actual use conditions.
2. A nomnal 900mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the V
X
specification
under actual use conditions.
3. In all cases, input waveformtimng is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1.8V/ns or greater is to be maintained in the 20% to 80% range of the input waveform
Value
V
DDI
V
DDI
/2
Units
V
mV
V
V/ns
Crossing Point
1.8
POWER SUPPLY CHARACTERISTICS FOR 1.8V LV TTL OUTPUTS
(1)
Symbol
Parameter
I
DDQ
Quiescent V
DD
Power Supply Current
(3)
V
DDQ
= Max., REF = LOW,
PD
= HIGH,
nSOE
= LOW,
PLL_EN
= HIGH, DS
[1:0]
= MM nF
[2:1]
= LH,
FBF
[2:1]
= LH, Outputs enabled, All outputs unloaded
I
DDQQ
Quiescent V
DDQ
Power Supply Current
(3)
V
DDQ
= Max., REF = LOW,
PD
= HIGH,
nSOE
= LOW,
PLL_EN
= HIGH, DS
[1:0]
= MM nF
[2:1]
= LH,
FBF
[2:1]
= LH, Outputs enabled, All outputs unloaded
I
DDPD
Power Down Current
V
DD
= Max.,
PD
= LOW,
nSOE
= LOW,
PLL_EN
= HIGH
I
DDD
Dynamc V
DD
Power Supply
V
DD
= Max., V
DDQ
= Max., C
L
= 0pF
Current per Output
I
DDDQ
Dynamc V
DDQ
Power Supply
V
DD
= Max., V
DDQ
= Max., C
L
= 0pF
Current per Output
I
TOT
Total Power V
DD
Supply Current
(4)
V
DDQ
= 1.8V., F
VCO
= 100MHz, C
L
= 15pF
V
DDQ
= 1.8V., F
VCO
= 250MHz, C
L
= 15pF
I
TOTQ
Total Power V
DDQ
Supply Current
(4)
V
DDQ
= 1.8V., F
VCO
= 100MHz, C
L
= 15pF
V
DDQ
= 1.8V., F
VCO
= 250MHz, C
L
= 15pF
Test Conditions
(2)
Typ.
15
Max
25
Unit
mA
1.5
50
μ
A
0.5
16
3
25
mA
μ
A/MHz
22
30
μ
A/MHz
40
70
55
135
60
105
85
205
mA
mA
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termnation resistors are excluded fromthese measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
4. FS = HIGH.
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