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參數(shù)資料
| 型號(hào)： | IDT5992A-5JI |
| 英文描述： | EIGHT DISTRIBUTED-OUTPUT CLOCK DRIVER|LDCC|32PIN|PLASTIC |
| 中文描述： | 八分布式輸出時(shí)鐘驅(qū)動(dòng)器| LDCC | 32腳|塑料 |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大?。?/td> | 116K |
| 代理商： | IDT5992A-5JI |
7
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT5992A
PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
REF
FB
Q
OTHER Q
INVERTED Q
REF DIVIDED BY 2
REF DIVIDED BY 4
t
REF
t
PD
t
SKEW2
t
SKEW3, 4
t
SKEW1, 3, 4
t
SKEW2, 4
t
SKEW3, 4
t
SKEW3, 4
t
SKEW2
t
SKEWPR
t
SKEW0, 1
t
JR
t
ODCV
t
ODCV
t
RPWH
t
RPWL
t
SKEWPR
t
SKEW0, 1
AC TIMING DIAGRAM
NOTES:
V
DDQ
/PE: The AC Timng Diagramapplies to V
DDQ
/PE=V
DD
. For V
DDQ
/PE=GND, the negative edge of FB aligns with the negative edge of REF, divided outputs change on the
negative edge of REF, and the positive edges of the divide-by-2 and the divide-by-4 signals align.
Skew:
The time between the earliest and the latest output transition among all outputs for which the same t
U
delay has been selected when all are loaded with 50pF (30pF for
-2 and -5) and termnated with 50
to V
DD
/2.
t
SKEWPR
:
The skew between a pair of outputs (xQ
0
and xQ
1
) when all eight outputs are selected for 0t
U
.
t
SKEW0
:
The skew between outputs when they are selected for 0t
U
.
t
DEV
:
The output-to-output skew between any two devices operating under the same conditions (V
DD
,
ambient temperature, air flow, etc.)
t
ODCV
:
The deviation of the output froma 50% duty cycle. Output pulse width variations are included in t
SKEW2
and t
SKEW4
specifications.
t
PWH
is measured at 0.8V
DD
.
t
PWL
is measured at 0.2V
DD
.
t
ORISE
and t
OFALL
are measured between 0.2V
DD
and 0.8V
DD
.
t
LOCK
:
The time that is required before synchronization is achieved. This specification is valid only after V
DD
is stable and within normal operating limts. This parameter is measured
fromthe application of a new signal or frequency at REF or FB until t
PD
is within specified limts.
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