參數(shù)資料
型號: IDT54FCT648ATLB8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28
封裝: LCC-28
文件頁數(shù): 1/8頁
文件大?。?/td> 217K
代理商: IDT54FCT648ATLB8
1
IDT54/74FCT648T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
AUGUST 2000
1999
Integrated Device Technology, Inc.
DSC-5507/-
c
IDT54/74FCT648T/AT/CT
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS OCTAL
TRANSCEIVER/
REGISTER (3-STATE)
DESCRIPTION:
The FCT648T consists of a bus transceiver with 3-state D-type flip-flops
and control circuitry arranged for multiplexed transmission of data directly
from the data bus or from the internal storage registers. The FCT648T
utilizes the enable control (
G) and direction (DIR) pins to control the
transceiver functions.
SAB and SBA control pins are provided to select either real- time or stored
data transfer. The circuitry used for select control will eliminate the typical
decoding glitch that occurs in a multiplexer during the transition between
stored and real-time data. A low input level selects real-time data and a high
selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D flip-
flops by low-to-high transitions at the appropriate clock pins (CPAB or
CPBA), regardless of the select or enable control pins.
A1
G
DIR
CPBA
SBA
CPAB
SAB
ONE OF EIGH T CHANNELS
B REG
A REG
B1
1D
C1
1D
TO SEVEN OTHER CHANN ELS
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
Low input and output leakage ≤1A (max.)
CMOS power levels
True TTL input and output compatibility
VOH = 3.3V (typ.)
VOL = 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Std., A, and C speed grades
High drive outputs (-15mA IOH, 64mA IOL)
Power off disable outputs permit “l(fā)ive insertion”
Available in the following packages:
Industrial: SOIC, QSOP
Military: CERDIP, LCC, CERPACK
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