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參數(shù)資料
| 型號(hào)： | ICSSSTV16859 |
| 英文描述： | DDR 13-Bit to 26-Bit Registered Buffer |
| 中文描述： | 復(fù)員13位至26位注冊(cè)緩沖區(qū) |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 233K |
| 代理商： | ICSSSTV16859 |
5
ICSSSTV16859
Preliminary Product Preview
Third party brands and names are the property of their respective owners.
Timing Requirements
(over recommended operating free-air temperature range, unless otherwise noted)
MIN
MAX
200
f
clock
t
PD
t
RST
t
SL
Clock frequency
Clock to output time
Reset to output time
Output slew rate
Setup time, fast slew rate
2, 4
Setup time, slow slew rate
3, 4
Hold time, fast slew rate
2, 4
Hold time, slow slew rate
3, 4
1 - Guaranteed by design, not 100% tested in production.
2 - For data signal input slew rate
=
≥
1V/ns.
3 - For data signal input slew rate
=
≥
=
0.5V/ns and < 1V/ns.
MHz
ns
ns
V/ns
ns
ns
ns
ns
TBD
5
4
1
0.75
0.9
0.75
0.9
4 - CLK, CLK# signals input slew rates are
=
≥
=
1V/ns.
SYMBOL
t
SU
T
h
Notes:
V
DD
= 2.5V ±0.2V
UNITS
PARAMETERS
Data before CK
↑
, CK#
↓
Data after CK
↑
, CK#
↓
Switching Characteristics
(over recommended operating free-air temperature range, unless otherwise noted)
From
(Input)
(Output)
MIN
200
1.1
TYP
MAX
fmax
t
PD
t
ph1
MHz
ns
ns
CLK, CLK#
CLK, CLK#
Q
Q
2.8
5
SYMBOL
V
DD
= 2.5V ±0.2V
UNITS
To
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相關(guān)代理商/技術(shù)參數(shù) |
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| ICSSSTV16859CG-T | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTV16859YG-T | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTV16859YK | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
| ICSSSTV32852 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:DDR 24-Bit to 48-Bit Registered Buffer |
| ICSSSTV32852YHT | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:DDR 24-Bit to 48-Bit Registered Buffer |
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