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參數(shù)資料
| 型號： | ICSSSTV16859 |
| 英文描述： | DDR 13-Bit to 26-Bit Registered Buffer |
| 中文描述： | 復(fù)員13位至26位注冊緩沖區(qū) |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 233K |
| 代理商： | ICSSSTV16859 |
4
ICSSSTV16859
Preliminary Product Preview
Third party brands and names are the property of their respective owners.
Electrical Characteristics - DC
T
A
= 0 - 70
o
C; V
DD
= 2.5 V +/-200mV, V
DDQ
=2.5V 200mV; (unless otherwise stated)
SYMBOL
PARAMETERS
V
IK
I
I
= -18mA
I
OH
= -100μA
I
OH
= -16mA
I
OL
= 100μA
I
OL
= 16mA
I
I
All Inputs
V
I
= V
DD
or GND
Standby (Static)
RESET# = GND
V
I
= V
IH
(AC#) or V
IL
(AC),
RESET# = V
DD
RESET = V
DD
, V
I
= V
IH(AC)
or V
IL (AC)
, CK and CK#
switching 50% duty cycle.
RESET# = V
DD
, V
I
= V
IH(AC)
or VIL (AC), CK and CK#
switching 50% duty cycle.
One data input switching at
half clock frequency, 50%
duty cycle
r
OH
Output High
r
OL
Output Low
[r
OH
-
r
OL
] each
separate bit
Data Inputs
CK and CK#
Notes:
1 - Guaranteed by design, not 100% tested in production.
V
DD
2.3V
2.3V-2.7
2.3V
2.3-2.7V
2.3V
2.7V
MIN
TYP
MAX
-1.2
UNITS
V
DD
-0.2
1.95
0.2
0.35
±5
.01
μA
μA
Operating (Static)
TBD
mA
Dynamic operating
clock only
TBD
μ/clock MHz
Dynamic Operating
per each data input
TBD
μA/ clock
MHz/data
2.3-2.7V
2.3-2.7V
7
7
20
20
r
O(
)
2.5V
4
2.5
2.5
3.5
3.5
I
O
= 0
CONDITIONS
2.7V
2.5V
V
I
= V
REF
±350Mv
V
ICR
= 1.25V, V
I(PP)
= 360mV
pF
I
OH
= 20mA
I
OL
= 20mA
V
C
i
I
O
= 20mA, T
A
= 25
°
C
V
OH
V
OL
I
DD
I
DDD
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| ICSSSTV16859CG-T | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 13-Bit to 26-Bit Registered Buffer |
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