- 您現(xiàn)在的位置：買賣IC網 > PDF目錄67708 > ICS951402YG-T 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | ICS951402YG-T |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-48 |
| 文件頁數(shù)： | 14/23頁 |
| 文件大?。?/td> | 289K |
| 代理商： | ICS951402YG-T |
21
Integrated
Circuit
Systems, Inc.
ICS951402
Advance Information
0660—05/05/05
The impact of asserting the PCI_STOP# signal will be the following. All PCI and stoppable PCI_F clocks will latch low in their
next high to low transition. The PCI_STOP# setup time tsu is 10 ns, for transitions to be recognized by the next rising edge.
PCI_STOP#
PCI_F 33MHz
PCI 33MHz
tsu
Assertion of PCI_STOP# Waveforms
PCI_STOP# - Assertion (transition from logic "1" to logic "0")
CPU_STOP#
CPUT
CPUC
The impact of asserting the CPU_STOP# pin is all CPU outputs that are set in the I
2C configuration to be stoppable via
assertion of CPU_STOP# are to be stopped after their next transition following the two CPU clock edge sampling as shown.
The final state of the stopped CPU signals is CPUT=High and CPUC=Low. There is to be no change to the output drive current
values. The CPUT will be driven high with a current value equal to (MULTSEL0) X (I REF), the CPUC signal will not be driven.
CPU_STOP# - Assertion (transition from logic "1" to logic "0")
Assertion of CPU_STOP# Waveforms
相關PDF資料 |
PDF描述 |
|---|---|
| ICS951402YGLF-T | 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS951402YF-T | 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS951402YF-T | 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS951402YFLF-T | 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS951403YGLF-T | 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS951403 | 制造商:ICS 制造商全稱:ICS 功能描述:AMD-K7 System Clock Chip |
| ICS951403YFLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:AMD-K7 System Clock Chip |
| ICS951403YGLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:AMD-K7 System Clock Chip |
| ICS951411 | 制造商:ICS 制造商全稱:ICS 功能描述:System Clock Chip for ATI RS400 P4TM-based Systems |
| ICS951411BGLF | 功能描述:IC SYSTEM CLOCK CHIP P4 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:PCI Express® (PCIe) 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
發(fā)布緊急采購，3分鐘左右您將得到回復。