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參數(shù)資料
| 型號(hào)： | ICS951402YF-T |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | MO-118, SSOP-48 |
| 文件頁數(shù)： | 21/23頁 |
| 文件大小： | 289K |
| 代理商： | ICS951402YF-T |
7
Integrated
Circuit
Systems, Inc.
ICS951402
Advance Information
0660—05/05/05
I
2C Table: Reserved Register
Byte 3
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
-
Reserved
RW
-
1
Bit 6
-
Reserved
RW
-
1
Bit 5
-
Reserved
RW
-
1
Bit 4
-
Reserved
RW
-
1
Bit 3
-
Reserved
RW
-
1
Bit 2
-
Reserved
RW
-
1
Bit 1
-
Reserved
RW
-
1
Bit 0
-
Reserved
RW
-
1
I
2C Table: Functionality and Frequency Select Register
Byte 4
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
-
FS3
Freq Select Bit 7
RW
0
Bit 6
-
FS2
Freq Select Bit 6
RW
0
Bit 5
-
FS1
Freq Select Bit 5
RW
0
Bit 4
-
FS0
Freq Select Bit 4
RW
See
Frequency Table
0
Bit 3
-
FS Source
Frequency H/W or
IIC Select
RW
Latch Input
IIC
0
Bit 2
-
FS4
Freq Select Bit 2
RW
See Frequency Table
0
Bit 1
-
SS_EN
SPREAD Enable
RW
OFF
ON
1
Bit 0
-
All Outputs
Output Control
RW
Normal
Tri-state
0
Note: If Byte4 bit1 = 0 then FS4=0
I
2C Table: Output Control and Read Back Register
Byte 5
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
31
AGP1
Output Control
RW
Disable
Enable
1
Bit 6
32
AGP0
Output Control
RW
Disable
Enable
1
Bit 5
26
24_48#SEL
24 or 48 Select
RW
48MHz
24MHz
X
Bit 4
-
FS4RB
FS4 Read back
R
-
X
Bit 3
-
FS3RB
FS3 Read back
R
-
X
Bit 2
-
FS2RB
FS2 Read back
R
-
X
Bit 1
-
FS1RB
FS1 Read back
R
-
X
Bit 0
-
FS0RB
FS0 Read back
R
-
X
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| ICS951402YF-T | 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
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參數(shù)描述 |
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