參數(shù)資料
型號(hào): ICS950805
英文描述: 16-Bit Buffers/Drivers With 3-State Outputs 48-SSOP -40 to 85
中文描述: 頻率發(fā)生器200MHz的CPU的時(shí)鐘差分
文件頁(yè)數(shù): 14/20頁(yè)
文件大?。?/td> 180K
代理商: ICS950805
14
ICS950805
0649H—02/25/05
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock,
there is no defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66
by the standard skew described below as Tpci.
Un-Buffered Mode 3V66 & PCI Phase Relationship
3V66 (1:0)
3V66 (4:2)
3V66_5
PCICLK_F (2:0) PCICLK (6:0)
Tpci
Group Skews at Common Transition Edges: (Un-Buffered Mode)
GROUP
SYMBOL
3V66
CONDITIONS
MIN
0
TYP
MAX
500
UNITS
ps
3V66
3V66 (5:0) pin to pin skew
PCI
PCI
PCI_F (2:0) and PCI (6:0) pin to pin skew
0
500
ps
3V66 to PCI
1
Guarenteed by design, not 100% tested in production.
S
3V66-PCI
3V66 (5:0) leads 33MHz PCI
1.5
3.5
ns
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