參數(shù)資料
型號(hào)： ICS950227YFT
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： 0.300 INCH, MO-118, SSOP-56
文件頁(yè)數(shù)： 16/17頁(yè)
文件大?。?/td> 128K
代理商： ICS950227YFT
8
Integrated
Circuit
Systems, Inc.
ICS950227
0641D—07/03/03
I
2C Table: VCO Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
N Div7
RW
-
X
Bit 6
N Div6
RW
-
X
Bit 5
N Div5
RW
-
X
Bit 4
N Div4
RW
-
X
Bit 3
N Div3
RW
-
X
Bit 2
N Div2
RW
-
X
Bit 1
N Div1
RW
-
X
Bit 0
N Div0
RW
-
X
I
2C Table: Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
SSP7
RW
-
X
Bit 6
SSP6
RW
-
X
Bit 5
SSP5
RW
-
X
Bit 4
SSP4
RW
-
X
Bit 3
SSP3
RW
-
X
Bit 2
SSP2
RW
-
X
Bit 1
SSP1
RW
-
X
Bit 0
SSP0
RW
-
X
I
2C Table: Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
Reserved
RW
-
0
Bit 6
Reserved
RW
-
0
Bit 5
SSP13
RW
-
X
Bit 4
SSP12
RW
-
X
Bit 3
SSP11
RW
-
X
Bit 2
SSP10
RW
-
X
Bit 1
SSP9
RW
-
X
Bit 0
SSP8
RW
-
X
I
2C Table: Output Divider Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
Reserved
RW
-
0
Bit 6
Reserved
RW
-
0
Bit 5
Reserved
RW
-
0
Bit 4
Reserved
RW
-
0
Bit 3
CPU Div3
RW
X
Bit 2
CPU Div2
RW
X
Bit 1
CPU Div1
RW
X
Bit 0
CPU Div0
RW
X
I
2C Table: Output Divider Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
Reserved
RW
-
0
Bit 6
Reserved
RW
-
0
Bit 5
Reserved
RW
-
0
Bit 4
Reserved
RW
-
0
Bit 3
3V66 Div3
RW
X
Bit 2
3V66 Div2
RW
X
Bit 1
3V66 Div1
RW
X
Bit 0
3V66 Div0
RW
X
See Table 3: Divider Ratio
Combination Table 2-3-5-7
Byte 16
-
3V66 divider ratio can
be configured via these
4 bits individually.
See Table 3: Divider Ratio
Combination Table
-
Byte 14
It is recommended to
use ICS Spread %
table for spread
programming.
-
CPU divider ratio can
be configured via these
4 bits individually.
-
Byte 13
These Spread
Spectrum bits will
program the spread
pecentage. It is
recommended to use
ICS Spread % table for
spread programming.
-
Byte 12
The decimal
representation of N Div
(8:0) is equal to VCO
divider value. Default
at power up = latch-in
or Byte 0 Rom table.
-
Byte 15
-
相關(guān)PDF資料
PDF描述
ICS950227YFLFT 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
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