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參數(shù)資料
| 型號： | ICS950218YFLF-T |
| 英文描述： | Programmable Timing Control Hub TM for P4 TM |
| 中文描述： | 可編程定時控制中心，為小四至商標(biāo)商標(biāo) |
| 文件頁數(shù)： | 1/19頁 |
| 文件大小： | 143K |
| 代理商： | ICS950218YFLF-T |
Integrated
Circuit
Systems, Inc.
ICS950218
0466B—03/17/04
*MULTISEL1/REF1
VDDREF
X1
X2
GND
*FS2/PCICLK0
*FS3/PCICLK1
SEL48_24#/PCICLK2
VDDPCI
*FS4/PCICLK3
PCICLK4
PCICLK5
GND
PCICLK6
PCICLK7
PCICLK8
PCICLK9
VDDPCI
Vtt_PWRGD#
RESET#
GND
*FS0/48MHz
*FS1/24_48MHz
AVDD48
1
**
REF0/MULTSEL0*
GND
VDDCPU
CPUCLKT2
CPUCLKC2
GND
PD#
CPUCLKT0
CPUCLKC0
VDDCPU
CPUCLKT1
CPUCLKC1
GND
I REF
AVDD
GND
VDD3V66
3V66_0
3V66_1
GND
3V66_2
3V66_48MHz/SEL66_48#
SCLK
SDATA
*
I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Pin Configuration
Recommended Application:
Brookdale and Brookdale-G chipset with P4 processor.
Output Features:
3 - Pairs of differential CPU clocks (differential current
mode)
3 - 3V66 @ 3.3V
10 - PCI @ 3.3V
1 - 48MHz @ 3.3V fixed
2 - REF @ 3.3V, 14.318MHz
1 - 48_66MHz selectable @ 3.3V fixed
1 - 24_48MHz selectable @ 3.3V
Programmable Timing Control Hub for P
4
48-Pin 300-mil SSOP
2
7
6
5
4
K
L
z
C
H
U
M
P
C
6
z
6
H
V
3
M
K
L
z
C
H
I
C
M
P
4
S
F
3
S
F
2
S
F
1
S
F
0
S
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
2
0
2
0
2
0
3
0
3
0
4
0
4
0
4
0
5
0
5
0
6
0
6
6
6
0
7
0
7
0
8
0
8
0
9
8
6
2
0
1
6
3
1
4
0
2
6
6
0
0
1
0
0
2
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
7
0
7
0
7
0
7
0
7
0
8
0
8
0
7
3
7
0
6
0
7
0
7
0
7
0
7
0
7
0
8
0
8
6
6
0
6
0
7
0
7
0
7
0
7
8
6
8
6
8
6
8
6
6
6
6
6
6
6
6
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
3
0
3
0
3
0
3
0
3
0
4
0
4
0
3
1
3
0
3
0
3
0
3
0
3
0
3
0
3
0
4
0
4
3
3
0
3
0
3
0
3
0
3
0
3
4
3
4
3
4
3
4
3
3
3
3
3
3
3
3
3
0
0
0
0
0
0
0
3
Frequency Table
1 This output has 2X drive
* Internal Pull-up resistor of 120K to VDD
** Internal Pull-down resistor of 120K to GND
Features/Benefits:
Programmable output frequency.
Programmable output divider ratios.
Programmable output rise/fall time.
Programmable output skew.
Programmable spread percentage for EMI control.
Watchdog timer technology to reset system
if system malfunctions.
Programmable watch dog safe frequency.
Support I
2
C Index read/write and block read/write
operations.
Uses external 14.318MHz crystal.
Key Specifications:
CPU Output Jitter <150ps
3V66 Output Jitter <250ps
CPU Output Skew <100ps
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS950220 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950220AFLF | 功能描述:IC TIMING CTRL HUB P4 48-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS950220AFLFT | 功能描述:IC TIMING CTRL HUB P4 48-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS950220YFLFT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950220YFLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
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