參數(shù)資料
型號(hào): ICS94211yF-T
英文描述: Programmable System Frequency Generator for PII/III⑩
中文描述: 可編程系統(tǒng)頻率發(fā)生器有價(jià)證券/三⑩
文件頁(yè)數(shù): 15/16頁(yè)
文件大?。?/td> 359K
代理商: ICS94211YF-T
15
ICS94211
PCI_STOP# Timing Diagram
PCI_STOP# is an asynchronous input to the
ICS94211
. It is used to turn off the PCICLK clocks for low power operation. PCI_STOP#
is synchronized by the
ICS94211
internally. The minimum that the PCICLK clocks are enabled (PCI_STOP# high pulse) is at least
10 PCICLK clocks. PCICLK clocks are stopped in a low state and started with a full high pulse width guaranteed. PCICLK clock on
latency cycles are only one rising PCICLK clock off latency is one PCICLK clock.
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS94211 device.)
2. PCI_STOP# is an asynchronous input, and metastable conditions may exist. This signal is required to be synchronized
inside the ICS94211.
3. All other clocks continue to run undisturbed.
4. CPU_STOP# is shown in a high (true) state.
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