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參數(shù)資料
| 型號： | ICS9219YGLF-T |
| 英文描述： | Direct Rambus Clock Generator Lite |
| 中文描述： | 直接Rambus的時(shí)鐘發(fā)生器建興 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 80K |
| 代理商： | ICS9219YGLF-T |
Integrated
Circuit
Systems, Inc.
General Description
Features
ICS9219
0931B—10/25/04
Block Diagram
Direct Rambus Clock Generator Lite
ICS9219
is a High-speed clock generator providing 400 or
533 MHz differential clock source for direct Rambus
memory system.
ICS9219
takes a crystal as an input
reference source, and produces the differential output
clock required for the Rambus channel.
ICS9219
provides
a solution for a broad range of Direct Rambus memory
applications.
ICS9219
can be used in single or dual
Rambus channels. An additional LVCMOS output, which
provides a reference clock at the crystal frequency for the
other system blocks is also included.
Compatible with all Direct Rambus
TM
based ICs
Provides differential clock source for direct
Rambus
memory system with 1GHz data transfer
rate capability
Cycle to Cycle jitter is less than 100ps
3.3V + 4% supply
LVCMOS REF clock @ crystal frequency
Output edge rate control to minimize EMI
PLL
Control
Logic
Xtal
OSC
FS0
X1
X2
FS1
FS2
VDDT
BUSCLKT
BUSCLKC
REF
VDDT 1
GND 2
X2 3
X1 4
VDD 5
REF 6
GND 7
FS1* 8
16 FS0*
15 VDD
14 GND
13 BUSCLKT
12 BUSCLKC
11 GND
10 VDD
9 FS2*
I
Pin Configuration
16-Pin 173 mil TSSOP
* Pins have 60K internal pull-up to VDD
Table 1. PLL Multiplier Selection and Output Frequency
FS0
Mult
BUSCLK
1
400.00
533.30
0
1
16
21.33
2
Notes:
1 Output frequencies are based on 25MHz XTAL Input
multipliers are also applicable to spread spectrum modulated input clocks.
2 Default muliplier value at power up.
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