參數(shù)資料
型號: ICS874002AGLF
元件分類: 時鐘及定時
英文描述: 874002 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝: 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20
文件頁數(shù): 2/13頁
文件大小: 260K
代理商: ICS874002AGLF
Integrated
Circuit
Systems, Inc.
874002AG
www.icst.com/products/hiperclocks.html
REV. A APRIL 6, 2006
10
ICS874002
PCI EXPRESS
JITTER ATTENUATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS874002.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS874002 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD = 3.3V + 5% = 3.465V, which gives worst case results.
Power (core)
MAX = VDD_MAX * (IDD_MAX + IDDA_MAX) = 3.465V * (80mA + 12mA) = 318.78mW
Power (outputs)
MAX = VDDO_MAX * IDDO_MAX = 3.465V * 110mA = 381.15mW
Total Power
_MAX = 318.78mW + 381.15mW = 699.93mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of
the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used.
Assuming a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per
Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.700W * 66.6°C/W = 116.6°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air
flow, and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE
θθθθθ
JA
FOR
20-LEAD TSSOP, FORCED CONVECTION
θθθθθ
JA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
114.5°C/W
98.0°C/W
88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
73.2°C/W
66.6°C/W
63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
相關(guān)PDF資料
PDF描述
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