參數(shù)資料
型號(hào): ICS874005AG-04LF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 874005 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
封裝: 4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-24
文件頁數(shù): 1/14頁
文件大?。?/td> 1038K
代理商: ICS874005AG-04LF
PCI EXPRESS JITTER ATTENUATOR
ICS874005-04
IDT / ICS PCI EXPRESS JITTER ATTENUATOR
1
ICS874005AG-04 REV A SEPTEMBER 26, 2006
PRELIMINARY
GENERAL DESCRIPTION
The ICS874005-04 is a high performance Diff-
erential-to-LVDS Jitter Attenuator designed for use
in PCI Express systems. In some PCI Express
systems, such as those found in desktop PCs, the
PCI Express clocks are generated from a low
bandwidth, high phase noise PLL frequency synthesizer. In
these systems, a jitter attenuator may be required to attenuate
high frequency random and deterministic jitter components
from the PLL synthesizer and from the system board. The
ICS874005-04 has 2 PLL bandwidth modes: 200kHz and
800kHz. The 200kHz mode will provide maximum jitter
attenuation, but with higher PLL tracking skew and spread
spectrum modulation from the motherboard synthesizer may
be attenuated. The 800kHz bandwidth provides the best
tracking skew and will pass most spread profiles, but the jitter
attenuation will not be as good as the lower bandwidth modes.
The ICS874005-04 suppor ts Serdes reference clock
frequencies of 100MHz, 125MHz and 250MHz.
The ICS874005-04 uses IDT’s 3rd Generation FemtoClockTM
PLL technology to achive the lowest possible phase noise.
The device is packaged in a 24 Lead TSSOP package, making
it ideal for use in space constrained applications such as PCI
Express add-in cards.
FEATURES
Five differential LVDS output pairs
One differential clock input (100MHz typical)
Supports 100MHz, 125MHz, and 250MHz Serdes reference
clocks
CLK and nCLK supports the following input types:
LVPECL, LVDS, LVHSTL, SSTL, HCSL
Output frequency range: 98MHz - 320MHz
Input frequency range: 98MHz - 128MHz
VCO range: 490MHz - 640MHz
Cycle-to-cycle jitter: 15ps (typical)
3.3V operating supply
Two bandwidth modes allow the system designer to make
jitter attenuation/tracking skew design trade-offs
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS
ICS
QA0
nQA0
BLOCK DIAGRAM
BW_SEL
0 = PLL Bandwidth: ~200kHz (default)
1 = PLL Bandwidth: ~800kHz
PLL BANDWIDTH
F_SELA
0
÷5 (default)
1
÷4
F_SELB
0
÷2 (default)
1
÷4
VCO
490 - 640MHz
Phase
Detector
M = ÷5 (fixed)
Pulldown
OEA
F_SELA
BW_SEL
CLK
nCLK
F_SELB
MR
OEB Pullup
QA1
nQA1
QB0
nQB0
QB1
nQB1
Pulldown
Pullup
Pulldown
PIN ASSIGNMENT
ICS874005-04
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
nQB2
nQA1
QA1
VDDO
QA0
nQA0
MR
BW_SEL
VDDA
F_SELA
VDD
OEA
1
2
3
4
5
6
7
8
9
10
11
12
QB2
VDDO
QB1
nQB1
QB0
nQB0
F_SELB
OEB
GND
nCLK
CLK
24
23
22
21
20
19
18
17
16
15
14
13
Pulldown
QB2
nQB2
0 = ~200kHz
1 = ~800kHz
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
相關(guān)PDF資料
PDF描述
ICS874005AGT 874005 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
ICS874005AG 874005 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
ICS874005AGLF 874005 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
ICS8741004AGIT 8741004 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
ICS8741004AGI 8741004 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS874005AG-04LFT 功能描述:IC PCI EXPRSS/JITT ATTEN 24TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:HiPerClockS™, FemtoClock™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
ICS874005AGLF 功能描述:IC JITTER ATTENUATOR 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:HiPerClockS™, FemtoClock™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/頻率發(fā)生器,多路復(fù)用器 PLL:是 主要目的:存儲(chǔ)器,RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6
ICS874005AGLFT 功能描述:IC PCI EXPRSS/JITT ATTEN 24TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:HiPerClockS™, FemtoClock™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
ICS8741004AGLF 功能描述:IC PCI EXPRSS/JITT ATTEN 24TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:HiPerClockS™, FemtoClock™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/頻率發(fā)生器,多路復(fù)用器 PLL:是 主要目的:存儲(chǔ)器,RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6
ICS8741004AGLFT 功能描述:IC PCI EXPRSS/JITT ATTEN 24TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:HiPerClockS™, FemtoClock™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT