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參數(shù)資料
| 型號： | ICS84329BYT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBC-HD, LQFP-32 |
| 文件頁數(shù)： | 15/21頁 |
| 文件大?。?/td> | 2417K |
| 代理商： | ICS84329BYT |
ICS84329B
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
IDT / ICS LVPECL FREQUENCY SYNTHESIZER
3
ICS84329BV REV. B DECEMBER 20, 2007
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Name
Type
Description
M0, M1, M2, M3, M4,
M5, M6, M7, M8
Input
Pullup
M divider inputs. Data latched on LOW-to-HIGH transition of nP_LOAD input.
LVCMOS/LVTTL interface levels.
N0, N1
Input
Pullup
Determines N output divider value as defined in Table 3C, Function Table.
LVCMOS/LVTTL interface levels.
VEE
Power
Negative supply pins.
TEST
Output
Test output which is used in the serial mode of operation.
Single-ended LVPECL interface levels.
VCC
Power
Core supply pins.
FOUT, nFOUT
Output
Differential output pair for the synthesizer. LVPECL interface levels.
OE
Input
Pullup
Output enable. When logic HIGH, the outputs are enabled (default). When logic LOW,
the outputs are disabled and drive differential low: FOUT = LOW, nFOUT = HIGH.
LVCMOS / LVTTL interface levels.
nc
Unused
No connect.
S_CLOCK
Input
Pulldown
Clocks the serial data present at S_DATA input into the shift register on the rising edge
of S_CLOCK. LVCMOS/LVTTL interface levels.
S_DATA
Input
Pulldown
Shift register serial input. Data sampled on the rising edge of S_CLOCK.
LVCMOS/LVTTL interface levels.
S_LOAD
Input
Pulldown
Controls transition of data from shift register into the M divider.
LVCMOS/LVTTL interface levels.
VCCA
Power
Analog supply pin.
XTAL_IN
XTAL_OUT
Input
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
nP_LOAD
Input
Pullup
Parallel load input. Determines when data present at M8:M0 is loaded into M divider,
and when data present at N1:N0 sets the N output divider value. LVCMOS/LVTTL
interface levels.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
CIN
Input Capacitance
4
pF
RPULLUP
Input Pullup Resistor
51
k
RPULLDOWN
Input Pulldown Resistor
51
k
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相關(guān)代理商/技術(shù)參數(shù) |
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| ICS8432BI51 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:700MHZ, CYRSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS8432BI-51L | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:700MHZ, CYRSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS8432BK-51 | 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS8432BK-51LF | 功能描述:IC SYNTHESIZER LVPECL 32-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS8432BK-51LFT | 功能描述:IC SYNTHESIZER LVPECL 32-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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