780MHZ, C
參數(shù)資料
型號: ICS84320AK-01LF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 22/22頁
文件大小: 0K
描述: IC SYNTHESIZER 780MHZ 32-VFQFPN
標(biāo)準(zhǔn)包裝: 490
系列: HiPerClockS™
類型: 頻率合成器
PLL: 帶旁路
輸入: 晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/是
頻率 - 最大: 780MHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-VFQFPN 裸露焊盤(4x4)
包裝: 托盤
其它名稱: 84320AK-01LF
84320AY-01
www.idt.com
REV. D JULY 26, 2010
9
ICS84320-01
780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS84320-01 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC, VCCA, and VCCO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 2 illustrates how
a 24
Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each V
CCA pin. The 24Ω
resistor can also be replaced by a ferrite bead.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 2. POWER SUPPLY FILTERING
24
Ω
V
CCA
10
μF
.01
μF
3.3V
.01
μF
V
CC
INPUTS:
CRYSTAL INPUTS
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1k
Ω
resistor can be tied from XTAL_IN to ground.
TEST_CLK INPUT
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1k
Ω resistor can be tied from the TEST_CLK to
ground.
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVPECL OUTPUTS
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
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