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參數(shù)資料
| 型號(hào)： | ICS843003AGT |
| 英文描述： | FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| 中文描述： | FEMTOCLOCKS晶體到3.3的LVPECL頻率合成器 |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 295K |
| 代理商： | ICS843003AGT |
843003AG
www.icst.com/products/hiperclocks.html
REV. A JULY 27, 2004
12
Integrated
Circuit
Systems, Inc.
ICS843003
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
LAYOUT GUIDELINE
Figure 5A shows a schematic example of the ICS843003. An
example of LVEPCL termination is shown in this schematic.
Additional LVPECL termination approaches are shown in the
LVPECL Termination Application Note. In this example, an 18
FIGURE 5A. ICS843003 SCHEMATIC EXAMPLE
pF parallel resonant 31.25MHz crystal is used. The C1=27pF
and C2=33pF are recommended for frequency accuracy.
The C1 and C2 may be slightly adjusted for optimizing fre-
quency accuracy.
FIGURE 5B. ICS843003 PC BOARD LAYOUT EXAMPLE
R7
133
C2
33pF
Set Logic
Input to
'0'
VCCA
VCCO=3.3V
R6
82.5
RD2
1K
VCC
RU2
Not Install
VDD
C8
0.1u
C3
10uF
R9
133
Zo = 50 Ohm
VDD
+
-
RU1
1K
3.3V
R2
10
VCC
X1
31.25MHz
R4
82.5
U1
ICS843003
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
D
IV_
SEL
B0
VC
O
_
SEL
MR
V
CCO
_
A
QA
0
nQ
A
0
OE
B
OE
A
FB
_
D
IV
VC
C
A
VC
C
D
IV_
SEL
A0
D
IV_
SEL
A
1
VE
E
XT
AL
_
O
U
T
XT
AL
_
IN
TE
S
T_
C
L
K
XT
AL
_
SEL
nQB
1
QB
1
nQB
0
QB
0
V
CCO
_
B
D
IV_
SEL
B
1
+
-
To Logic
Input
pins
C7
0.1u
Set Logic
Input to
'1'
VC
C
O
R5
133
Zo = 50 Ohm
18pF
R10
82.5
C1
27pF
VCC=3.3V
R8
82.5
R3
133
Zo = 50 Ohm
VCCO
RD1
Not Install
C4
0.01u
Logic Control Input Examples
Zo = 50 Ohm
C6
0.1u
To Logic
Input
pins
3.3V
PC BOARD LAYOUT EXAMPLE
Figure 5B shows an example of ICS843003 P.C. board layout.
The crystal X1 footprint shown in this example allows installa-
tion of either surface mount HC49S or through-hole HC49 pack-
age. The footprints of other components in this example are listed
in the
Table 7. There should be at least one decoupling capacitor
per power pin. The decoupling capacitors should be located as
close as possible to the power pins. The layout assumes that
the board has clean analog power ground plane.
e
c
n
e
r
e
f
e
Re
z
i
S
2
C
,
1
C2
0
4
0
3
C5
0
8
0
8
C
,
7
C
,
6
C
,
5
C
,
4
C3
0
6
0
2
R3
0
6
0
s
e
z
i
s
t
n
e
n
o
p
m
o
c
s
t
s
il
,
7
e
l
b
a
T
:
E
T
O
N
.
e
l
p
m
a
x
e
t
u
o
y
a
l
s
i
h
t
n
i
n
w
o
h
s
TABLE 7. FOOTPRINT TABLE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS843003AI01 | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS-TM CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS843003I-01 | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS-TM CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS843003I-09 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FEMTOCLOCKS? CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS843004 | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS⑩ LVCMOS/CRYSTAL-TO- 3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS843004-01 | 制造商:ICS 制造商全稱:ICS 功能描述:FEMTOCLOCKS-TM CRYSTAL-TO- 3.3V LVPECL FREQUENCY SYNTHESIZER |
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