- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8698 > ICS83940DYI-01LFT (IDT, Integrated Device Technology Inc)IC CLOCK BUFFER MUX 2:18 32-LQFP PDF資料下載
參數(shù)資料
| 型號： | ICS83940DYI-01LFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:18 32-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | HiPerClockS™ |
| 類型： | 扇出緩沖器（分配），多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:18 |
| 差分 - 輸入:輸出： | 是/無 |
| 輸入： | CML，LVCMOS，LVPECL，LVTTL，SSTL |
| 輸出： | LVCMOS，LVTTL |
| 頻率 - 最大： | 250MHz |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 83940DYI-01LFT |
ICS83940DYI-01 REVISION A SEPTEMBER 27, 2010
13
2010 Integrated Device Technology, Inc.
ICS83940I-01 Data Sheet
LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
LVPECL Clock Input Interface
The PCLK /nPCLK accepts LVPECL, SSTL and other differential
signals. Both differential signals must meet the VPP and VCMR input
requirements. Figures 2A to 2C show interface examples for the
PCLK/nPCLK input driven by the most common driver types. The
input interfaces suggested here are examples only. If the driver is
from another vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confirm the driver
termination requirements.
Figure 2A. PCLK/nPCLK Input Driven by a
3.3V LVPECL Driver
Figure 2C. PCLK/nPCLK Input Driven by an
SSTL Driver
Figure 2B. PCLK/nPCLK Input Driven by a
3.3V LVPECL Driver with AC Couple
Recommendations for Unused Input and Output Pins
Inputs:
PCLK/nPCLK Inputs
For applications not requiring the use of the differential input, both
PCLK and nPCLK can be left floating. Though not required, but for
additional protection, a 1k
resistor can be tied from PCLK to
ground.
LVCMOS_CLK Input
For applications not requiring the use of a clock input, it can be left
floating. Though not required, but for additional protection, a 1k
resistor can be tied from the LVCMOS_CLK input to ground.
LVCMOS Control Pins
All control pins have internal pulldowns; additional resistance is not
required but can be added for additional protection. A 1k
resistor
can be used.
Outputs:
LVCMOS Outputs
All unused LVCMOS output can be left floating. There should be no
trace attached.
R3
125
R4
125
R1
84
R2
84
3.3V
Zo = 50
Zo = 50
PCLK
nPCLK
3.3V
LVPECL
Input
PCLK
nPCLK
LVPECL
Input
SSTL
2.5V
Zo = 60
Zo = 60
2.5V
3.3V
R1
120
R2
120
R3
120
R4
120
R3
84
R4
84
R1
125
R2
125
R5
100 - 200
R6
100 - 200
PCLK
nPCLK
3.3V LVPECL
3.3V
Zo = 50
Zo = 50
3.3V
LVPECL
Input
C1
C2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-262-IV-S | CONVERTER MOD DC/DC 15V 150W |
| V300A8H400BF2 | CONVERTER MOD DC/DC 8V 400W |
| V300A8H400BL3 | CONVERTER MOD DC/DC 8V 400W |
| MC100ES8111ACR2 | IC CLOCK BUFFER MUX 2:10 32-LQFP |
| V300A8H400BL2 | CONVERTER MOD DC/DC 8V 400W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS83940DYI-01T | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER |
| ICS83940DYILF | 功能描述:IC CLOCK BUFFER MUX 2:18 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 產(chǎn)品培訓(xùn)模塊:High Bandwidth Product Overview 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:4 差分 - 輸入:輸出:是/是 輸入:CML，LVDS，LVPECL 輸出:CML 頻率 - 最大:2.5GHz 電源電壓:2.375 V ~ 2.625 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) |
| ICS83940DYILFT | 功能描述:IC CLOCK BUFFER MUX 2:18 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
| ICS83940DYIT | 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 2:18 250MHZ 32TQFP |
| ICS83940DYI-T | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。