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參數(shù)資料
| 型號： | ICS8302AMT |
| 英文描述： | LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER |
| 中文描述： | 低偏移，1對2的LVCMOS / LVTTL扇出緩沖器 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 252K |
| 代理商： | ICS8302AMT |
7
ICS932S203
0601E—12/22/04
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature. . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70°C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
SYMBOL
Input High Voltage
V
IH
Input Low Voltage
V
IL
Input High Current
I
IH
V
IN
= V
DD
I
IL1
V
IN
= 0 V; Inputs with no pull-up resistors
Input Low Current
CONDITIONS
MIN
2
TYP
MAX
V
DD
+ 0.3
0.8
5
UNITS
V
V
mA
mA
V
SS
- 0.3
-5
-5
I
IL2
V
IN
= 0 V; Inputs with pull-up resistors
-200
Operating Supply Current I
DD3.3OP
C
L
= Full load; Select @ 100 MHz
229
230
360
mA
I
DD3.3OP
C
L
=Full load; Select @ 133 MHz
I
DD3.3PD
F
i
V
DD
= 3.3 V
L
pin
C
IN
Logic Inputs
C
OUT
Output pin capacitance
C
INX
X1 & X2 pins
T
trans
To 1st crossing of target frequency
T
s
From 1st crossing to 1% target frequency
T
STAB
From V
DD
= 3.3 V to 1% target frequency
t
PZH
,t
PZL
Output enable delay (all outputs)
t
PHZ
,t
PLZ
Output disable delay (all outputs)
220
233
360
60
mA
Powerdown Current
Input Frequency
Pin Inductance
mA
MHz
nH
pF
pF
pF
ms
ms
ms
ns
ns
14.318
7
5
6
27
45
3
3
3
10
10
Transition time
1
Settling time
1
Clk Stabilization
1
1
1
1
Guaranteed by design, not 100% tested in production.
Delay
1
Input Capacitance
1
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