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參數(shù)資料
| 型號： | ICS514MT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 140 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 236K |
| 代理商： | ICS514MT |
ICS514
MDS 514 D
1
Revision 070704
Integrat ed Circuit Systems ● 5 25 Race Stre et, San Jo se, CA 9 5126 ● te l (40 8 ) 2 97-12 01 ● www.ics t.co m
LOCO PLL CLOCK GENERATOR
Description
The ICS514 LOCOTM is the most cost effective way to
generate a high-quality, high-frequency clock output
from a 14.31818 MHz crystal or clock input. The name
LOCO stands for Low Cost Oscillator, as it is designed
to replace crystal oscillators in most electronic
systems. Using Phase-Locked Loop (PLL) techniques,
the device uses a standard, inexpensive crystal to
produce output clocks up to 66.66 MHz.
Stored in the chip’s ROM is the ability to generate five
different output frequencies, allowing one chip to work
in different speed processor systems.
The device also has a power-down mode that turns off
the clock outputs when both select pins are low. In this
mode, the internal PLL is not running.
Features
Packaged as 8-pin SOIC or die
Available in Pb (lead) free package
ICS’ lowest cost PLL clock plus reference
Produces common computer frequencies
Input crystal frequency typically 14.3182 MHz
Output clock frequencies up to 66.66 MHz from a
14.3182 MHz crystal or input clock
Low jitter of 50 ps (one sigma)
Compatible with all popular CPUs
Duty cycle of 45/55
Custom frequencies available
Operating voltage of 3.3 V to 5.5 V
Power-down mode turns off chip
25 mA drive capability at TTL levels
Advanced, low-power CMOS process
Block Diagram
CLK
PLL Clock
Synthesis
and Control
Circuitry
14.31818 MHz crystal
or clock input
GND
VDD
Crystal
Oscillator
S1:0
X1/ICLK
X2
Optional crystal capacitors
2
REF
DATA SHEET
ICS514
IDT / ICS LOCO PLL CLOCK MULTIPLIER
ICS514
1
LOCO PLL CLOCK MULTIPLIER
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