參數(shù)資料
型號： ICS291PGLF
元件分類： XO, clock
英文描述： 200 MHz, OTHER CLOCK GENERATOR, PDSO20
封裝： 0.173 INCH, ROHS COMPLIANT, TSSOP-20
文件頁數(shù)： 1/8頁
文件大?。?/td> 167K
代理商： ICS291PGLF
ICS291
MDS 291 C
1
Revision 062205
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
Triple PLL Field Prog. Spread Spectrum Clock Synthesizer
PRELIMINARY INFORMATION
Description
The ICS291 field programmable spread spectrum clock
synthesizer generates up to six high-quality,
high-frequency clock outputs including multiple
reference clocks from a low-frequency crystal input. It
is designed to replace crystals, crystal oscillators and
stand alone spread spectrum devices in most
electronic systems.
Using ICS’ VersaClockTM software to configure PLLs
and outputs, the ICS291 contains a One-Time
Programmable (OTP) ROM for field programmability.
Programming features include input/output
frequencies, spread spectrum amount, eight selectable
configuration registers and up to two sets of three
low-skew outputs.
Each of the two output groups are powered by a
separate VDDO voltage. VDDO may vary from 1.8 V to
VDD.
Using Phase-Locked Loop (PLL) techniques, the
device runs from a standard fundamental mode,
inexpensive crystal, or clock. It can replace multiple
crystals and oscillators, saving board space and cost.
The ICS291 is also available in factory programmed
custom versions for high-volume applications.
Features
Packaged as 20-pin TSSOP
Eight addressable registers
Replaces multiple crystals and oscillators
Output frequencies up to 200 MHz at 3.3 V
Configurable Spread Spectrum Modulation
Input crystal frequency of 5 to 27 MHz
Clock input frequency of 3 to 166 MHz
Up to six reference outputs
Separate 1.8 to 3.3 V VDDO output level controls for
each bank of 3 outputs
Up to two sets of three low-skew outputs
Operating voltages of 3.3 V
Controllable output drive levels
Advanced, low-power CMOS process
Available in Pb (lead) free packaging
Block Diagram
Crystal
Oscillator
GND
3
VDD
PDTS
PLL2
PLL3
Divide
Logic
and
Output
Enable
Control
S2:S0
CLK1
CLK6
CLK5
CLK4
CLK3
CLK2
3
OTP
ROM
with PLL
Values
X2
Crystal or
Clock Input
External capacitors
are required with a crystal input.
X1/ICLK
PLL1 with
Spread
Spectrum
VDDO1
VDDO2
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