參數(shù)資料
型號: ICS1894KI-40LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 38/53頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 40QFN
標準包裝: 1
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII,RMII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤
供應商設(shè)備封裝: 40-VFQFPN(6x6)
包裝: 標準包裝
其它名稱: 800-2032-6
ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
IDT 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
43
ICS1894-40
REV K 022412
100M MII Media Independent Interface: Receive Latency
The table below lists the significant time periods for the 100M MII/100M Stream Interface receive latency. The time
periods consist of timings of signals on the following pins:
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
The 100M MII/100M Stream Interface: Receive Latency Timing Diagram shows the timing diagram for the time
periods.
100M MII/100M Stream Interface: Receive Latency Timing Diagram
Time
Period
Parameter
Conditions
Min. Typ.
Max.
Units
t1
First Bit of /J/ into TP_RX to /J/ on RXD
100M MII
16
17
Bit times
RXCLK
TP_RX
Shown
unscrambled.
RXD
t1
相關(guān)PDF資料
PDF描述
ID82C55A IC I/O EXPANDER 24B 40DIP
ID82C82 IC DRIVER BUS OCT LATCHING 20DIP
ID82C86H IC TRANSCEIVER OCT BUS 20-DIP
IDT5V5201DCGI TXRX 1CH M-LVDS TO LVTTL 8-SOIC
IDT5V5206DCGI TXRX 1CH M-LVDS TO LVTTL 8-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS1894KI-43LFT 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 40QFN
ICS200 制造商:ICS 制造商全稱:ICS 功能描述:SMPTE Time Code Receiver/Generator
ICS2001M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Digital-to-Analog Converter
ICS2001N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Digital-to-Analog Converter
ICS2002 制造商:ICS 制造商全稱:ICS 功能描述:Wavedec Digital Audio Codec