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參數(shù)資料
| 型號： | ICS1893BKLFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 71/133頁 |
| 文件大?。?/td> | 0K |
| 描述： | PHYCEIVER LOW PWR 3.3V 56-VQFN |
| 標準包裝： | 1,000 |
| 系列： | PHYceiver™ |
| 類型： | PHY 收發(fā)器 |
| 規(guī)程： | MII |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 56-VFQFP-EP（8x8） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 1893BKLFT |
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ICS1893BF, Rev. F, 5/13/10
May, 2010
42
Chapter 6 Functional Blocks
ICS1893BF Data Sheet - Release
Copyright 2009, IDT, Inc.
All rights reserved.
During 10Base-T data reception, a Manchester Decoder translates the serial bit stream obtained from the
Twisted-Pair Receiver (MDI) into an NRZ bit stream. The Manchester Decoder then passes the data to the
MAC Interface in parallel format.
Manchester-encoded signals have the following advantages:
Every bit period has an encoded clock.
The split-phase nature of the signal always provides a zero DC level regardless of the data (that is, there
is no baseline wander phenomenon).
The primary disadvantage in using Manchester-encoded signals is that it doubles the data rate, making it
operationally prohibitive for 100-MHz operations.
6.5.2 10Base-T Operation: Clock Synthesis
The ICS1893BF synthesizes the clocks required for synchronizing data transmission. In 10Base-T mode,
the MAC Interface provides a 10M MII (Media Independent Interface):
10M MII interface, the ICS1893BF synthesizes a 2.5-MHz clock for nibble-wide transactions
6.5.3 10Base-T Operation: Clock Recovery
The ICS1893BF recovers its receive clock from the Manchester-encoded data stream obtained from its
Twisted-Pair Receiver using a phase-locked loop (PLL). The ICS1893BF then uses this recovered clock for
synchronizing data transmission between itself and the MAC. Receive-clock PLL acquisitions begin with
reception of the MAC Frame Preamble and continue as long as the ICS1893BF is receiving data.
6.5.4 10Base-T Operation: Idle
An ICS1893BF transmits Normal Link Pulses on its MDI in the absence of data. During this time the link is
Idle, and the ICS1893BF periodically transmits link pulses at a rate of one link pulse every 16 ms in
compliance with the ISO/IEC 8802-3 standard. In 10Base-T mode, the ICS1893BF continues transmitting link
pulses even while receiving data. This situation does not generate a Collision Detect signal (COL) because
link pulses indicate an idle state for a link.
6.5.5 10Base-T Operation: Link Monitor
When an ICS1893BF is in 10Base-T mode, its Link Monitor Function observes the data received by the
10Base-T Twisted-Pair Receiver to determine the link status. The results of this continual monitoring are
stored in the Link Status bit. The Station Management entity (STA) can access the Link Status bit in either
the Status Register (bit 1.2) or the QuickPoll Detailed Status Register (bit 17.0).
When the Link Status bit is:
Zero, either a valid link is not established or the link is momentarily dropped since either the last read of
the Link Status bit or the last reset of the ICS1893BF.
One, a valid link is established.
The ICS1893BF Link Status bit is a latching low (LL) bit. (For more information on latching high and latching
low bits, see Section 7.1.4.1, “Latching High Bits” and Section 7.1.4.2, “Latching Low Bits”.)
The criteria used by the Link Monitor Function to declare a link either valid or invalid depends upon these
factors: the present state of the link, whether its Smart Squelch function is enabled, and the incoming data.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1893BKT | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| ICS1893BRIEF | 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893BY-10 | 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR) |
| ICS1893BY-10LF | 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| ICS1893BY-10LFT | 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
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