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| 型號： | ICS1493K-17LFT |
| 廠商： | INTEGRATED CIRCUIT TECHNOLOGY CORP |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 48 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC20 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, QFN-20 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 217K |
| 代理商： | ICS1493K-17LFT |
Clock Synthesizer for Portable Systems
MDS 1493-17 A
6
Revision 101005
Integr ated Circuit System s
● 525 Ra ce Stree t, Sa n Jose, CA 951 26 ● te l (4 08) 297 -1201 ● www.icst.com
ICS1493-17
PRELIMINAR Y INFORMA T ION
AC Electrical Characteristics
Unless stated otherwise, VDDO = 1.8 V ±0.1 V, Ambient Temperature -10
°C to +80°C
Note 1: Measured with a 5 pF load.
Note 2: Finish from prior cycle to start of new cycle.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
fIN
27
MHz
Output Rise Time
tOR
20% to 80%, Note 1
1.1
2.2
3.3
ns
Output Fall Time
tOF
80% to 20%, Note 1
1.1
2.2
3.3
ns
Output Impedance
RO
VO=VDDO/2
33
46
68
Output Clock Duty Cycle
VDDO/2, 27 MHz,
Note 1
40
50
60
%
VDDO/2, Note 1
45
50
55
%
Absolute Clock Period Jitter
Note 1
± 225
ps
Frequency Synthesis Error
All outputs
0
ppm
Modulation Rate
30
35
40
kHz
Short Term Jitter
Cycle-to-cycle
225
375
ps
Long Term Jitter
27 MHz, n=1000
750
ps
Long Term Jitter
48 MHz, n=1000
750
ps
Long Term Jitter
22M and 22/24M,
n=1000
1100
ps
Long Term Jitter
37 MHz, n=1000
2.5
9
ns
Power-up Time
tPU
From minimum VDD
to outputs stable
1.5
4
ms
Output Enable Time
20
ns
Output Disable Time
20
ns
Switching Time
22/24M, Note 2
250
ns
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