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參數(shù)資料
| 型號： | ICM7563M |
| 廠商： | IC MICROSYSTEMS SDN BHD |
| 元件分類： | DAC |
| 英文描述： | 12/10/8-Bit Low Power Quad DACs With Serial Interface and Voltage Output |
| 中文描述： | QUAD, SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO10 |
| 封裝： | MSOP-10 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大小： | 205K |
| 代理商： | ICM7563M |
ICM7563/7543/7523
Power Supply Bypassing and Layout Considerations
As in any precision circuit, careful consideration has to be given to layout of the supply and ground. The return path from the GND
to the supply ground should be short with low impedance. Using a ground plane would be ideal. The supply should have some
bypassing on it. A 10 μF tantalum capacitor in parallel with a 0.1 μF ceramic with a low ESR can be used. Ideally these would be
placed as close as possible to the device. Avoid crossing digital and analog signals, specially the reference, or running them close
to each other.
Output Swing Limitations
The ideal rail-to-rail DAC would swing from GND to V
DD
.
However, offset and gain error limit this ability. Figure 4 illustrates how a
negative offset error will affect the output. The output will limit close to ground since this is single supply part, resulting in a dead-
band area. As a larger input is loaded into the DAC the output will eventually rise above ground. This is why the linearity is
specified for a starting code greater than zero.
Figure 5 illustrates how a gain error or positive offset error will affect the output when it is close to V
DD
. A positive gain error or
positive offset will cause the output to be limited to the positive supply voltage resulting in a dead-band of codes close to full-scale.
Rev. A7 ICmic reserves the right to change specifications without prior notice
8
DEADBAND
NEGATIVE
OFFSET
Figure 4.
Effect of Negative Offset
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