3
FN2866.4
February 9, 2007
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VDD to VSS). . . . . . . . . . . . . . . . . . . . . . . . . . . .18V
Terminals (Pins 5, 6, 7, 8). . . . . . . . . . (VSS -0.3V) to (VDD +0.3V)
Continuous Output Current (Each Output). . . . . . . . . . . . . . . . 50mA
Operating Conditions
Temperature Range
ICM7242I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-25°C to +85°C
ICM7242C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Thermal Resistance (Typical, No
te2)θJA (°C/W)
PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
160
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Due to the SCR structure inherent in the CMOS process, connecting any terminal to voltages greater than VDD or less than VSS may cause
destructive device latchup. For this reason, it is recommended that no inputs from external sources not operating on the same supply be applied
to the device before its supply is established and, that in multiple supply systems, the supply to the ICM7242 be turned on first.
2.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications V
DD = 5V, TA = +25°C, R = 10kΩ, C = 0.1F, VSS = 0V, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Guaranteed Supply Voltage
VDD
2-
16
V
Supply Current
IDD
Reset
-
125
-
A
Operating, R = 10k
Ω, C = 0.1F
-
340
800
A
Operating, R = 1M
Ω, C = 0.1F
-
220
600
A
TB Inhibited, RC Connected to VSS
-
225
-
A
Timing Accuracy
-5
-
%
RC Oscillator Frequency Temperature
Drift
Δf/Δt
Independent of RC Components
-
250
-
ppm/°C
Time Base Output Voltage
VOTB
ISOURCE = 100A
-
3.5
-
V
ISINK = 1.0mA
-
0.40
-
V
Time Base Output Leakage Current
ITBLK
RC = Ground
-
25
A
Trigger Input Voltage
VTRIG
VDD = 5V
-
1.6
2.0
V
VDD = 15V
-
3.5
4.5
V
Reset Input Voltage
VRST
VDD = 5V
-
1.3
2.0
V
VDD = 15V
-
2.7
4.0
V
Trigger/Reset Input Current
ITRIG, IRST
-10
-
A
Max Count Toggle Rate
fT
VDD = 2V
Counter/Divider Mode
-1
-
MHz
VDD = 5V
2
6
-
MHz
VDD = 15V
-
13
-
MHz
50% Duty Cycle Input with Peak to Peak
Voltages Equal to VDD and VSS
Output Saturation Voltage
VSAT
All Outputs Except TB Output VDD = 5V,
IOUT = 3.2mA
-
0.22
0.4
V
Output Sourcing Current
ISOURCE
VDD = 5V Terminals 2 and 3, VOUT = 1V
-
300
-
A
MIN Timing Capacitor (Note
3)CT
10
-
pF
Timing Resistor Range (Note
3)RT
VDD = 2 - 16V
1k
-
22M
Ω
NOTE:
3. For design only, not tested.
ICM7242