參數(shù)資料
型號: IC42S32800L-6BG
英文描述: 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
中文描述: 200萬× 32位× 4個銀行(256兆)內(nèi)存
文件頁數(shù): 10/62頁
文件大?。?/td> 879K
代理商: IC42S32800L-6BG
IC42S32800
IC42S32800L
10
Integrated Circuit Solution Inc.
DR046-0B 12/21/2004
READ A
NOP
NOP
NOP
NOP
WRITE B
NOP
NOP
DQM
COMMAND
DQ’s
NOP
DOUT A
DINB2
DINB1
DINB0
Must be Hi-Z before
the Write Command
: "H" or "L"
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
CLK
DQM
COMMAND
NOP
NOP
NOP
NOP
NOP
ABANKA
DIN A 0
DIN A 1
DIN A 2
DIN A 3
1 Clk Interval
CAS# latency=2
tCK2, DQs
READ A
WRITEA
: "H" or "L"
NOP
T0
T2
T1
T3
T4
T5
T6
T7
T8
CLK
DQM
COMMAND
NOP
READ A
NOP
NOP
NOP
NOP
DIN B0
DIN B1
DIN B2
DIN B3
CAS# latency=2
tCK2, DQ’s
NOP
NOP
: "H" or "L"
T0
T2
T1
T3
T4
T5
T6
T7
T8
WRITEB
Read to Write Interval (Burst Length = 4,CAS#Latency =3)
Read to Write Interval (Burst Length = 4,CAS#Latency =2)
Read to Write Interval (Burst Length = 4,CAS#Latency =2)
A read burst without the auto precharge function may be interrupted by a BankPrecharge/
PrechargeAll command to the same bank.The following figure shows the optimum time that
BankPrecharge/PrechargeAll command is issued in different CAS#latency.
相關(guān)PDF資料
PDF描述
IC42S32800L-6BI 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6BIG 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6T 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6TG 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6TI 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IC42S32800L-6BI 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6BIG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6T 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6TG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:2M x 32 Bit x 4 Banks (256-MBIT) SDRAM
IC42S32800L-6TI 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:2M x 32 Bit x 4 Banks (256-MBIT) SDRAM