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參數(shù)資料
| 型號(hào)： | IC42S16800L-6T(G) |
| 英文描述： | 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 4（2）M中的x 8（16）位× 4銀行（128 - Mbit的）同步動(dòng)態(tài)RAM |
| 文件頁(yè)數(shù)： | 5/69頁(yè) |
| 文件大小： | 1118K |
| 代理商： | IC42S16800L-6T(G) |
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IC42S81600/IC42S81600L
IC42S16800/IC42S16800L
Integrated Circuit Solution Inc.
DR023-0E 6/11/2004
5
PIN FUNCTIONS
Symbol
Type
Function (In Detail)
CLK
CKE
Input Pin
Input Pin
Master Clock: Other inputs signals are referenecd to the CLK rising edge
Clock Enable: CKE HIGH activates, and CKE LOW deactivates internal
clock signals,device input buffers and output drivers. Deactivating the clock
(all banks idle), or ACTIVE POWER-DOWN (row ACTIVE in any bank).
Chip Select:
CS
enables (registered LOW) and disables (registered HIGH)
the command decoder. All commands are masked when
CS
is registered
HIGH.
CS
provides for external bank selection on systems with multiple
banks.
CS
is considered part of the command code.
Command Inputs:
RAS
,
CAS
and
WE
(along with
CS
) define the command
being entered.
Address Inputs: Provide the row address for ACTIVE commands, and the
column address and AUTO PRECHARGE bit for READ/WRITE
commands, to select one location out of the memory array in the respective
bank. The row address is specified by A0-A11. The column address is
specified by A0-A9 (IC42S81600) / A0-A8 (IC42S16800)
Bank Address Inputs: BA0 and BA1 define to which bank an ACTIVE,
READ, WRITE or PRECHARGE command is being applied.
Din Mask / Output Disable: When DQM is high in burst write, Din for the
current cycle is masked. When DQM is is high in burst read, Dout is
disable at the next but one cycle.
Data Input / Output: Data bus.
Power Supply for the memory array and peripheral circuitry.
Power Supply are supplied to the output buffers only.
CS
Input Pin
RAS, CAS, WE
Input Pin
A0-A11
Input Pin
BA0,BA1
Input Pin
DQM, UDQM ,LDQM
Input Pin
DQ0 to DQ15
V
DD
,
V
SS
V
DDQ
,
V
SSQ
I/O Pin
Power Supply Pin
Power Supply Pin
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| IC42S16800L-6TG | IC DUAL SPDT ANALOG SW 16-SOIC |
| IC42S16800L-6TI | Single/Dual Supply, Quad SPST Switch |
| IC42S16800L-6TIG | 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16800L-7T | 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IC42S16800L-6TI | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16800L-6TI(G) | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16800L-6TIG | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16800L-7T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S16800L-7T(G) | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
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