參數(shù)資料
型號: IBMN325804CT3
廠商: IBM Microeletronics
英文描述: 256Mb(8Mbit x 8 I/O x 4 Bank) Synchronous DRAM(256M位(8M位 x 8 I/O x 4 組)同步動態(tài)RAM)
中文描述: 256Mb的(8Mbit × 8的I / O × 4行)同步DRAM(256M位(800萬位× 8的I / O × 4組)同步動態(tài)RAM)的
文件頁數(shù): 19/66頁
文件大?。?/td> 1699K
代理商: IBMN325804CT3
IBMN325164CT3
IBMN325804CT3
IBMN325404CT3
Preliminary
256Mb Synchronous DRAM - Die Revision B
06K0608.F39375A
10/00
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 19 of 66
Although a Read Command with auto-precharge can not be interrupted by a command to the same bank, it
can be interrupted by a Read or Write Command to a different bank. If the command is issued before auto-
precharge begins then the precharge function will begin with the new command. The bank being auto-pre-
charged may be reactivated after the delay t
RP
.
If interrupting a Read Command with auto-precharge with a Write Command, DQM must be used to avoid DQ
contention.
Burst Read with Auto-Precharge Interrupted by Read
Burst Read with Auto-Precharge Interrupted by Write
t
RP
COMMAND
NOP
*
NOP
NOP
NOP
Auto-Precharge
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
NOP
NOP
t
RP
t
CK2
,
DQs
CAS latency = 2
t
CK3
,
DQs
CAS latency = 3
*
Bank can be reactivated at completion of t
RP
.
t
RP
is a function of clock cycle time and speed sort.
See the Clock Frequency and Latency table.
DOUT A
0
DOUT A
1
NOP
DOUT A
0
DOUT A
1
DOUT B
0
DOUT B
1
*
READ B
DOUT B
2
DOUT B
3
DOUT B
0
DOUT B
1
DOUT B
2
DOUT B
3
(Burst Length = 4, CAS Latency = 2, 3)
COMMAND
NOP
NOP
*
NOP
Auto-Precharge
t
RP
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
NOP
NOP
t
CK2,
DQs
CAS latency = 2
DQM
NOP
DOUT A
0
DIN B
0
DIN B
1
WRITE B
DIN B
2
DIN B
3
NOP
DIN B
4
*
Bank can be reactivated at completion of t
RP
.
t
RP
is a function of clock cycle time and speed sort.
.
See the Clock Frequency and Latency table
.
(Burst Length = 8, CAS Latency = 2)
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