參數(shù)資料
型號(hào): IBM25PPC750GXEBB5H43T
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 933 MHz, RISC PROCESSOR, CBGA292
封裝: 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292
文件頁數(shù): 55/74頁
文件大小: 1054K
代理商: IBM25PPC750GXEBB5H43T
Datasheet
DD1.X
IBM PowerPC 750GX RISC Microprocessor
750GX_ds_body.fm.SA14-2765-02
September 2, 2005
System Design Information
Page 59 of 73
SM
I
Low
Input
K
eeper
4
S
R
ES
ET
Low
Input
In
te
rrupt
/R
es
et
s
K
eeper
Ac
ti
ve
driver
or
pull
u
p
2
,3,
4,
S
Y
S
C
LK
High
Input
C
loc
k
Cont
ro
l
K
eeper
N
o
res
ist
or
b
y
design
Ac
ti
ve
driver
4,
TA
Low
Input
Dat
a
T
e
rm
inat
ion
K
eeper
Ac
ti
ve
driver
4,
T
B
E
N
High
Input
TB
ST
Low
Input
/O
u
tput
T
rans
fe
rAt
tr
ib
u
tes
K
eeper
3,
T
C
K
High
Input
J
T
A
G
Not
en
abl
ed
Ext
e
rnal
pulldown
5
K
to
GND
T
D
I
High
Input
J
T
A
G
E
nabled
high
In
te
rnal
enab
le
d
50
a
@
2.
5
V
25
a
@
1.
8
V
(t
he
pullup
current
fo
rt
he
int
e
r-
nal
r
e
sist
or)
T
D
O
High
O
u
tput
J
T
A
G
K
eeper
4
TE
A
Low
Input
Dat
a
T
e
rm
inat
ion
K
eeper
Ac
ti
ve
driver
or
pull
u
p
,4,
T
L
BI
SYN
C
Low
Input
Mode
Select
/C
ont
rol
K
eeper
Mus
tbe
a
c
ti
ve
ly
drive
n
4,
T
M
S
High
Input
J
T
A
G
E
nabled
high
In
te
rnal
enab
le
d
50
a
@
2.
5
V
25
a
@
1.
8
V
(t
he
pullup
current
fo
rt
he
int
e
r-
nal
r
e
sist
or)
T
abl
e
5
-6
.
Inp
ut/O
ut
put
U
s
a
ge
(
C
o
n
tin
ued
)
7
50G
X
S
ignal
Nam
e
Act
ive
Level
Input
/
Ou
tp
u
t
Us
age
G
roup
Input
/O
u
tput
wit
h
In
te
rnal
P
u
llup
Resist
ors
Le
vel
P
rot
ec
t
Required
Ext
e
rnal
R
e
si
st
or
Com
m
ent
s
N
ot
es
No
te
s:
1.
D
epends
on
the
s
yst
em
design.
T
he
el
e
c
tr
ic
al
char
act
e
rist
ic
s
of
t
he
750G
X
do
not
add
addit
ional
const
raint
s
t
o
t
he
sys
te
m
des
ign,
s
o
wh
at
eve
r
is
done
wi
th
t
he
net
will
de
pend
on
t
he
sy
st
e
m
requiremen
ts.
2.
H
R
ES
ET
,S
R
ES
ET
,and
T
R
ST
are
signals
used
f
o
rRI
SCW
a
tc
h
to
e
nabl
e
proper
operat
ion
of
the
de
buggers.
Logica
lAND
gat
es
s
hould
be
placed
bet
ween
t
hes
e
s
ign
a
ls
an
d
t
he
I
B
M
P
o
werP
C
750G
X
RI
SC
Micr
oproces
sor
(see
F
igur
e
5
-6
on
page
61)
.
3.
T
he
750GX
provides
protection
from
me
ta
-s
tabilit
y
on
i
npu
ts
t
h
rough
the
u
s
e
of
a
“k
eeper”
circuit
on
spec
if
ic
inputs
(see
Sec
ti
o
n
5
.9
on
pa
ge
69
f
o
r
a
more
det
ai
led
de
script
ion).
4.
If
a
sys
te
m
design
requires
a
signal
level
t
o
be
maint
a
ined
while
not
be
ing
a
c
ti
ve
ly
driven,
an
ex
te
rnal
res
is
tor
o
rdevice
m
ust
be
used
(keepers
assu
re
no
me
ta
-s
tabilit
y
of
input
s
but
do
not
guarant
ee
a
level).
5.
T
he
750G
X
does
not
require
ext
e
rnal
pullups
on
address
and
dat
a
li
n
e
s.
Cont
ro
llines
mus
t
be
t
reat
ed
individually.
6.
M
ode
Select
/C
on
tr
ol
pi
ns
r
equi
re
t
he
pr
oper
s
tat
e
at
HRES
E
T
to
c
onf
igure
t
he
opera
ting
m
ode
of
t
he
proce
ssor
(see
T
able
5-10
,
Sum
m
ary
of
M
ode
S
e
lect
,on
page
70).
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