參數(shù)資料
型號(hào)： IBM25NPE405L-3FA266CZ
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 266 MHz, RISC PROCESSOR, PBGA324
封裝： 23 X 23 MM, PLASTIC, EBGA-324
文件頁(yè)數(shù)： 30/52頁(yè)
文件大小： 907K
代理商： IBM25NPE405L-3FA266CZ
Preliminary
PowerNP NPe405L Embedded Processor Data Sheet
36
UART1_Rx
UART1 Receive data.
I
5V tolerant
3.3V LVTTL
1
UART1_Tx
UART1 Transmit data.
O
5V tolerant
3.3V LVTTL
6
[UART1_DCD]
UART1 Data Carrier Detect.
I
5V tolerant
3.3V LVTTL
1, 4
[UART1_DSR]
UART1 Data Set Ready.
I
5V tolerant
3.3V LVTTL
1, 4
[UART1_CTS]
UART1 Clear To Send.
I
5V tolerant
3.3V LVTTL
1, 4
[UART1_DTR]
UART1 Data Terminal Ready.
O
5V tolerant
3.3V LVTTL
6
[UART1_RTS]
UART1 Request To Send.
O
5V tolerant
3.3V LVTTL
6
[UART1_RI]
UART1 Ring Indicator.
I
5V tolerant
3.3V LVTTL
1, 4
IICSCL
IIC Serial Clock.
I/O
5V tolerant
3.3V LVTTL
1, 2
IICSDA
IIC Serial Data.
I/O
5V tolerant
3.3V LVTTL
1, 2
Interrupts Interface
[IRQ0:6]
Interrupt Requests.
I
5V tolerant
3.3V LVTTL
1
JTAG Interface
TDI
Test Data In.
I
5V tolerant
3.3V LVTTL
1, 4
TMS
Test Mode Select.
I
5V tolerant
3.3V LVTTL
1, 4
TDO
Test Data Out.
O
5V tolerant
3.3V LVTTL
TCK
Test Clock.
I
5V tolerant
3.3V LVTTL
1, 4
TRST
Test Reset. TRST must be low at power-on to reset the
JTAG boundary scan state machine.
I
5V tolerant
3.3V LVTTL
5
Signal Functional Description (Part 5 of 6)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-up and Pull-down Resistors” on page 30 for recommended termination values.
3. Must pull down. See “Pull-up and Pull-down Resistors” on page 30 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Peripheral Bus Control Signals” on page 31.
Signal Name
Description
I/O
Type
Notes
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IBM25PPC405CR-3BC266C 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|316PIN|PLASTIC
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