參數(shù)資料
型號: IBM25NPE405L-3FA133CZ
廠商: APPLIEDMICRO INC
元件分類: 微控制器/微處理器
英文描述: PowerNP
中文描述: 32-BIT, 133 MHz, RISC PROCESSOR, PBGA324
封裝: 23 X 23 MM, PLASTIC, EBGA-324
文件頁數(shù): 46/54頁
文件大?。?/td> 460K
代理商: IBM25NPE405L-3FA133CZ
Preliminary
PowerNP NPe405L Embedded Processor Data Sheet
44
Peripheral Interface Clock Timings
Parameter
Min
Max
Units
EMC0MDClk output frequency
2.5
MHz
EMC0MDClk period
400
ns
EMC0MDClk output high time
160
ns
EMC0MDClk output low time
160
ns
PHY0TxClk input frequency
2.5
25
MHz
PHY0TxClk period
40
400
ns
PHY0TxClk input high time
35% of nominal period
ns
PHY0TxClk input low time
35% of nominal period
ns
PHY0RxClk input frequency
2.5
25
MHz
PHY0RxClk period
40
400
ns
PHY0RxClk input high time
35% of nominal period
ns
PHY0RxClk input low time
35% of nominal period
ns
PerClk output frequency–133MHz
33.33
MHz
PerClk period–133MHz
30
ns
PerClk output frequency–200MHz
50
MHz
PerClk period–200MHz
20
ns
PerClk output frequency–266MHz)
66.66
MHz
PerClk period–266MHz
15
ns
PerClk output high time
45% of nominal period
55% of nominal period
ns
PerClk output low time
45% of nominal period
55% of nominal period
ns
UARTSerClk input frequency
(Note 1)
1000/(2T
OPB
+ 2ns)
MHz
UARTSerClk period
2T
OPB
+ 2
ns
UARTSerClk input high time
T
OPB
+ 1
ns
UARTSerClk input low time
T
OPB
+ 1
ns
TmrClk input frequency–133MHz
33.33
MHz
TmrClk period–133MHz
30
ns
TmrClk input frequency–200MHz
50
MHz
TmrClk period–200MHz
20
ns
TmrClk input frequency–266MHz
66.66
MHz
TmrClk period–266MHz
15
ns
TmrClk input high time
40% of nominal period
60% of nominal period
ns
TmrClk input low time
40% of nominal period
60% of nominal period
ns
HDLCEXTxClk, HDLCEXRxClk
0
8.192
MHz
Notes:
1. T
OPB
is the period in ns of the OPB clock. The maximum OPB clock frequency is 33.33 MHz for 133MHz parts, 50 MHz for
200MHz parts, and 66.66MHz for 266MHz parts.
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