- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379205 > IBM13T4644MPD (IBM Microeletronics) One Bank 4M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(1組 4M x 64 PC100小外形雙列直插同步動態(tài)RAM模塊) PDF資料下載
參數(shù)資料
| 型號： | IBM13T4644MPD |
| 廠商： | IBM Microeletronics |
| 英文描述： | One Bank 4M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(1組 4M x 64 PC100小外形雙列直插同步動態(tài)RAM模塊) |
| 中文描述： | 一位銀行分蘇× 64 SDRAM的內(nèi)存（小外形雙列直插內(nèi)存模塊）（1組4米× 64 PC100的小外形雙列直插同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 5/18頁 |
| 文件大小： | 271K |
| 代理商： | IBM13T4644MPD |
IBM13T4644MPE
IBM13T4644MPD
One Bank 4M x 64 SDRAM SO DIMM
45L7126.E93903A
5/99
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 5 of 18
Serial Presence Detect
Byte #
Description
SPD Entry Value
Serial PD Data Entry
(Hexadecimal)
Notes
0
Number of Serial PD Bytes Written during Production
128
80
1
Total Number of Bytes in Serial PD device
256
08
2
Fundamental Memory Type
SDRAM
04
3
Number of Row Addresses on Assembly
12
0C
4
Number of Column Addresses on Assembly
8
08
5
Number of DIMM Banks
1
01
6 - 7
Data Width of Assembly
x64
4000
8
Voltage Interface Level of this Assembly
LVTTL
01
9
SDRAM Device Cycle Time at CL=3
10.0ns
A0
10
SDRAM Device Access Time from Clock at CL=3
7.0ns
70
11
DIMM Configuration Type
Non-Parity
00
12
Refresh Rate/Type
SR/1x(15.625
μ
s)
80
13
Primary SDRAM Device Width
x16
10
14
Error Checking SDRAM Device Width
N/A
00
15
SDRAM Device Attr: Min Clk Delay, Random Col Access
1 Clock
01
16
SDRAM Device Attributes: Burst Lengths Supported
1,2,4,8, Full Page
8F
17
SDRAM Device Attributes: Number of Device Banks
4
04
18
SDRAM Device Attributes: CAS Latencies Supported
2, 3
06
19
SDRAM Device Attributes: CS Latency
0
01
20
SDRAM Device Attributes: WE Latency
0
01
21
SDRAM Module Attributes
Unbuffered
00
22
SDRAM Device Attributes: General
Wr-1/Rd Burst, Precharge All,
Auto-Precharge, V
DD
±
10%
0E
23
Minimum Clock Cycle at CL=2
15.0ns
F0
24
Maximum Data Access Time (t
AC
) from Clock at CL=2
8.0ns
80
25
Minimum Clock Cycle Time at CL=1
N/A
00
26
Maximum Data Access Time (t
AC
) from Clock at CL=1
N/A
00
27
Minimum Row Precharge Time (t
RP
)
30ns
1E
28
Minimum Row Active to Row Active delay (t
RRD
)
20ns
14
29
Minimum RAS to CAS delay (t
RCD
)
30ns
1E
30
Minimum RAS Pulse width (t
RAS
)
60ns
3C
31
Module Bank Density
32MB
08
32
Address and Command Setup Time Before Clock
3.0
30
33
Address and Command Hold Time After Clock
1.0
10
34
Data Input Setup Time Before Clock
3.0
30
1. cc = Checksum Data byte, 00-FF (Hex)
2. “R” = Alphanumeric revision code, A-Z, 0-9
3. rr = ASCII coded revision code byte “R”
4. yy = Binary coded decimal year code, 00-99 (Decimal)
‘
00-63 (Hex)
5. ww = Binary coded decimal week code, 01-52 (Decimal)
‘
01-34 (Hex)
6. ss = Serial number data byte, 00-FF (Hex)
Discontinued (4/1/00 last order; 7/31/00 - last ship)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM13T4644MPE | 4M x 64 PC100 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(4M x 64 PC100小外形雙列直插式同步動態(tài)RAM模塊) |
| IBM13T8644HPB | 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Modules）(8M x 64 144腳小外形雙列直插同步動態(tài)RAM模塊) |
| IBM13T8644HPC | 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Modules）(8M x 64 144腳小外形雙列直插同步動態(tài)RAM模塊) |
| IBM13T8644HPD | One Bank 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(1組 8M x 64 PC100小外形雙列直插同步動態(tài)RAM模塊) |
| IBM13T8644HPE | One Bank 8M x 64 SDRAM SO DIMM（Small Outline Dual In-line Memory Module）(1組 8M x 64 PC100小外形雙列直插式同步動態(tài)RAM模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IBM14H5481 | 制造商:AVED Memory Products 功能描述: |
| IBM14H5540 | 制造商:AVED MEMORY PRODUCTS 功能描述: 制造商:AVED Memory Products 功能描述: |
| IBM17R8251 | 制造商:AVED Memory Products 功能描述: |
| IBM17R8252 | 制造商:AVED Memory Products 功能描述: |
| IBM1805T | 制造商:Schneider Electric 功能描述:IBM1805T |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。