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參數(shù)資料
| 型號(hào)： | IBM13N16644HCB |
| 廠商： | IBM Microeletronics |
| 英文描述： | 16M x 64 Two-Bank Unbuffered SDRAM Module(16M x 64 2組不帶緩沖同步動(dòng)態(tài)RAM模塊) |
| 中文描述： | 1,600 × 64雙行緩沖內(nèi)存模組（16米x 64 2組不帶緩沖同步動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 13/18頁(yè) |
| 文件大?。?/td> | 331K |
| 代理商： | IBM13N16644HCB |
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IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 13 of 18
IBM13N16644HCB
IBM13N16734HCB
16M x 64/72 Two-Bank Unbuffered SDRAM Module
09K3605.F38386
12/99
Mode Register Set Cycle
Symbol
Parameter
75A
Units
Notes
Min.
Max.
t
RSC
Mode Register Set Cycle Time
2
—
CLK
1
1. These parameters account for the number of clock cycle and depend on the operating frequency of the clock, as follows:
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).
Read Cycle
Symbol
Parameter
-75A
Units
Notes
Min.
Max.
t
OH
Data Out Hold Time
2.7
—
ns
t
LZ
Data Out to Low Impedance Time
0
—
ns
t
HZ3
Data Out to High Impedance Time
3
5.4
ns
1
t
DQZ
DQM Data Out Disable Latency
2
—
CLK
1
1. Referenced to the time at which the output achieves the open circuit condition, not to output voltage levels.
Refresh Cycle
Symbol
Parameter
-75A
Units
Notes
Min.
—
Max.
64
t
REF
t
SREX
Refresh Period
ms
1
Self Refresh Exit Time
10
ns
1. 4096 auto refresh cycles.
Write Cycle
Symbol
Parameter
-75A
Units
Min.
1.5
Max.
—
t
DS
t
DH
t
DPL
Data In Set-up Time
ns
Data In Hold Time
0.8
—
ns
Data input to Precharge
Data In to Active Delay
CAS Latency = 3
DQM Write Mask Latency
15
—
ns
t
DAL3
5
—
CLK
t
DQW
0
—
CLK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM13N16734HCB | 16M x 72 Two-Bank Unbuffered SDRAM Module(16M x 72 2組不帶緩沖同步動(dòng)態(tài)RAM模塊) |
| IBM13N16644HC | 16M x 64 2 Bank Unbuffered SDRAM Module(16M x 64 2組不帶緩沖同步動(dòng)態(tài)RAM模塊) |
| IBM13N16734HC | 16M x 72 2 Bank Unbuffered SDRAM Module(16M x 72 2組不帶緩沖同步動(dòng)態(tài)RAM模塊) |
| IBM13Q16734HCB | 16M x 72 Registered SDRAM Module(16M x 72 200腳寄存同步動(dòng)態(tài)RAM模塊) |
| IBM13Q32734BCA | 32M x 72 Registered SDRAM Module(32M x 72 200腳寄存同步動(dòng)態(tài)RAM模塊) |
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