參數(shù)資料
型號: IBM11S4325BP
廠商: IBM Microeletronics
英文描述: 4M x 32 SO DIMM Module(4M x 32小外形雙列直插動(dòng)態(tài)RAM模塊)
中文描述: 4米× 32二氧化硫內(nèi)存模塊(4米× 32小外形雙列直插動(dòng)態(tài)內(nèi)存模塊)
文件頁數(shù): 1/23頁
文件大小: 604K
代理商: IBM11S4325BP
IBM11S4325BP
4M x 32 SO DIMM Module
50H4745
SA14-4458-03
Released 6/97
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 23
Features
72-Pin Small Outline Dual-In-Line
Memory Module
Performance:
High Performance CMOS process
Manufactured with 16Mb DRAMS (4M x 4)
Single 3.3V
±
0.3V Power Supply
Optimized for use in byte-write non-parity appli-
cations.
Low active current consumption
All inputs & outputs are LVTTL(3.3V) compatible
Extended Data Out (EDO) access cycle
Refresh Modes: RAS-Only, CBR, Hidden
Refresh and Self Refresh
2048 refresh cycles distributed across 128ms
11/11 Addressing (Row/Column)
Au contacts
Description
The IBM11S4325BP is a 4MB industry standard
72-pin 4-byte small outline dual in-line memory
module (SO DIMM). The module is organized as a
4Mx32 single bank high speed memory array that is
intended for use in 16, 32 and 64 bit applications. It
is manufactured with eight 4Mx4 TSOP devices,
each in a 300mil package.
The use of EDO DRAMs allows for a reduction in
Page Mode cycle time from 40ns (Fast Page) to
25ns (EDO, 60ns sort). The use of TSOP packages
allows tight DIMM spacing (.3” on center).
This assembly is intended for use in space con-
strained and/or low power applications.
The IBM 72-Pin SO DIMMs provide a high perfor-
mance, flexible 4-byte interface in a 2.35” long foot-
print.
-60
t
RAC
RAS Access Time
60ns
t
CAC
CAS Access Time
15ns
t
AA
Access Time From Address
30ns
t
RC
Cycle Time
104ns
t
HPC
EDO Mode Cycle Time
25ns
Card Outline
(Front) 1
(Back) 2
71
72
IBM11S1320NL1M x 3212/8, 5.0V, Au. IBM11S1320NN1M x 3212/8, 3.3V, Au.
Discontinued (9/98 - last order; 3/99 last ship)
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