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IBM11N1645L
IBM11N1735Q
1M x 64/72 DRAM Module
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 28 of 31
50H8035
SA14-4630-05
Revised 3/97
Presence Detect Operation
Clock and Data Conventions
: Data states on the
SDA line can change only during SCL low. SDA
state changes during SCL HIGH are reserved for
indicating start and stop conditions (Figure 1 & Fig-
ure 2).
Start Condition
: All commands are preceded by the
start condition, which is a HIGH to LOW transition of
SDA when SCL is high. The serial PD device contin-
uously monitors the SDA and SCL lines for the start
condition and will not respond to any command until
this condition has been met.
Stop Condition
: All communications are terminated
by a stop condition, which is a LOW to HIGH transi-
tion of SDA when SCL is HIGH. The stop condition
is also used to place the serial PD device into
standby power mode.
Acknowledge
: Acknowledge is a software conven-
tion used to indicate successful data transfers. The
transmitting device, either master or slave, will
release the bus after transmitting eight bits. During
the ninth clock cycle the receiver will pull the SDA
line LOW to acknowledge that it received the eight
bits of data (Figure 3).
The PD device will always respond with an acknowl-
edge after recognition of a start condition and its
slave address. If both the device and a write opera-
tion have been selected, The PD device, will respond
with an acknowledge after the receipt of each subse-
quent eight bit word. In the read mode the PD device
will transmit eight bits of data, release the SDA line
and monitor the line for an acknowledge. If an ac-
knowledge is detected and no stop condition is gen-
erated by the master, the slave will continue to
transmit data. If an acknowledge is not detected, the
slave will terminate further data transmissions and
await the stop condition to return to standby power
mode.
Presence Detect (EEPROM) Bus Timing
SCL
SDA
IN
t
SU:STO
t
HD:STA
t
SU:STA
t
AA
SDA
OUT
t
F
t
LOW
t
HIGH
t
R
t
SU:DAT
t
HD:DAT
t
BUF
t
DH
Figure 1. Data Window
Figure 2. Definition of Start & Stop
Figure 3. Acknowledge Response From Receiver
SCL
SDA
Data
Change
Data Stable
Data Stable
SCL
SDA
Start
Bit
Stop
Bit
Acknowledge
SCL from
Master
Data Output
from Trans
Data Output
from Receiver
8
9
Discontinued (9/98 - last order; 3/99 last ship)