參數(shù)資料
型號: IBM11M4735HB
廠商: IBM Microeletronics
英文描述: 4M x 72 DRAM Module(4M x 72 動態(tài)RAM模塊)
中文描述: 4米× 72內(nèi)存(4米× 72動態(tài)內(nèi)存模塊)
文件頁數(shù): 9/28頁
文件大?。?/td> 516K
代理商: IBM11M4735HB
IBM11M4735HB
4M x 72 DRAM MODULE
75H5409
GA14-4639-00
Revised 11/96
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 9 of 27
Read-Modify-Write Cycle
Symbol
Parameter
-60
Unit
Notes
Min
Max
t
RWC
Read-Modify-Write Cycle Time
143
ns
t
RWD
RAS to WE Delay Time
82
ns
1
t
CWD
CAS to WE Delay Time
44
ns
1
t
AWD
Column Address to WE Delay Time
57
ns
1
t
OEH
OE Command Hold Time
10
ns
1. t
WCS
, t
RWD
, t
CWD
, and t
AWD
are not restrictive parameters. They are included in the data sheet as electrical characteristics only. If
t
WCS
t
WCS
(min.), the entire cycle is an early write cycle and the data pin will remain open circuit (high impedance) through the
entire cycle; If t
RWD
t
RWD
(min.), t
CWD
t
CWD
(min.)and t
AWD
t
AWD
(min.), the cycle is a Read-Modify-Write cycle and the data will
contain read from the selected cell: If neither of the above sets of conditions are met, the condition of the data (at access time) is
indeterminate.
EDO Mode Cycle
Symbol
Parameter
-60
Units
Notes
Min.
Max.
t
HCAS
CAS Pulse Width (EDO Page Mode)
10
10K
ns
t
HPC
EDO Page Mode Cycle Time (Read/Write)
25
ns
t
HPRWC
EDO Page Mode Read Modify Write Cycle Time
72
ns
t
DOH
Data-out Hold Time from CAS
10
ns
t
WHZ
Output buffer Turn-Off Delay from WE
2
15
ns
t
WPZ
WE Pulse Width to Output Disable at CAS High
10
ns
t
CPRH
RAS Hold Time from CAS Precharge
40
ns
t
CPA
Access Time from CAS Precharge
40
ns
1
t
RASP
EDO Page Mode RAS Pulse Width
60
125K
ns
t
OEP
OE High Pulse Width
10
ns
t
OEHC
OE High Hold Time from CAS High
10
ns
1. Measured with the specified current load and 100pF at V
OL
= 0.8V and V
OH
= 2.0V.
Discontinued (9/98 - last order; 3/99 last ship)
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