參數(shù)資料
型號(hào)： IBM11D8325B
廠商： IBM Microeletronics
英文描述： 8M x 32 DRAM Module(8M x 32 動(dòng)態(tài)RAM模塊)
中文描述： 8米× 32內(nèi)存模塊（8米× 32動(dòng)態(tài)內(nèi)存模塊）
文件頁(yè)數(shù)： 1/21頁(yè)
文件大?。?/td> 391K
代理商： IBM11D8325B
IBM11D4325B
IBM11D8325B
4M/8M x 32 DRAM Module
50H7996
SA14-4341-02
Revised 8/96
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 20
Features
72-Pin JEDEC Standard Single-In-Line
Memory Module
Performance:
High Performance CMOS process
Single 5V,
±
0.5V Power Supply
All inputs & outputs are fully TTL & CMOS
compatible
Extended Data Out (EDO) access cycle
Refresh Modes: RAS-Only, CBR and Hidden
Refresh
2048 refresh cycles distributed across 32ms
11/11 Addressing (Row/Column)
Optimized for use in byte-write non-parity appli-
cations
Sn/Pb tab versions only
16MB versions in TSOP or SOJ packages.
32MB version only in SOJ package.
Description
The IBM11D8325B is a 32MB industry standard
72-pin 4-byte single in-line memory module (SIMM)
manufactured using EDO DRAMs. The use of EDO
DRAMs allows for a reduction in Page Mode Cycle
Time from 40ns (Fast Page) to 25ns (EDO, 60ns
sort). The module is organized as an 8Mx32 high
speed memory array, and is configured as two
4Mx32 banks -each independently selectable via
unique RAS inputs. The assembly is manufactured
with sixteen 4Mx4 devices, each in a 300mil SOJ
package, and is compatible with the JEDEC 72-Pin
SIMM standard.
The IBM11D4325B is a 16MB half populated ver-
sion, manufactured with eight 4Mx4 devices each in
a 300mil TSOP or SOJ package.
The IBM 72-Pin SIMMs provide a high performance,
flexible 4-byte interface in a 4.25” long footprint.
-60
-70
t
RAC
RAS Access Time
60ns
70ns
t
CAC
CAS Access Time
15ns
20ns
t
AA
Access Time From Address
30ns
35ns
t
RC
Cycle Time
104ns 124ns
t
HPC
EDO Mode Cycle Time
25ns
30ns
Card Outline
1
36 37
72
IBM11D8320B8M x 3211/11, 5.0V, Sn/Pb. IBM11E8320B8M x 3211/11, 5.0V, Au.
Discontinuted (9/98 - last order; 3/99 last ship)
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