參數(shù)資料
型號: IBM11D2320L
廠商: IBM Microeletronics
英文描述: 2M x 32 DRAM Module(2M x 32 動態(tài)RAM模塊)
中文描述: 200萬× 32內(nèi)存(2米× 32動態(tài)內(nèi)存模塊)
文件頁數(shù): 1/21頁
文件大?。?/td> 364K
代理商: IBM11D2320L
IBM11D1320L
IBM11D2320L
1M/2M x 32 DRAM Module
50H7991
SA14-4334-02
Revised 8/96
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 20
Features
72-Pin JEDEC Standard Single-In-Line
Memory Module
Performance:
High Performance CMOS process
Single 5V,
±
0.5V Power Supply
Low active current dissipation
All inputs & outputs are fully TTL & CMOS
compatible
Fast Page Mode access cycle
Refresh Modes: RAS-Only, CBR and Hidden
Refresh
1024 refresh cycles distributed across 16ms
10/10 Addressing (Row/Column)
Optimized for use in byte-write non-parity appli-
cations.
Only Tin/Lead versions available
DRAMs in TSOP or SOJ packages
Description
The IBM11D2320L is an 8MB industry standard
72-pin 4-byte single in-line memory module (SIMM).
The module is organized as a 2Mx32 high speed
memory array, and is configured as two 1Mx32
banks -each independently selectable via unique
RAS inputs. The assembly is intended for use in 16,
32 and 64 bit applications. It is manufactured with
four 1Mx16 devices, each in a 400mil TSOP or SOJ
package, and is compatible with the JEDEC 72-Pin
SIMM standard.
The IBM11D1320L is a 4MB half-populated version,
manufactured with two 1Mx16 devices in 400mil
TSOP or SOJ package .
The IBM 72-Pin SIMMs provide a high performance,
flexible 4-byte interface in a 4.25” long footprint.
-60
-70
t
RAC
RAS Access Time
60ns
70ns
t
CAC
CAS Access Time
15ns
20ns
t
AA
Access Time From Address
30ns
35ns
t
RC
Cycle Time
110ns 130ns
t
PC
Fast Page Mode Cycle Time 40ns
45ns
Card Outline
1
36 37
72
IBM11D2320BD2M x 3210/10, 5.0V, Sn/Pb. IBM11E2320BD2M x 3210/10, 5.0V, Au.
Discontinuted (9/98 - last order; 3/99 last ship)
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