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| 型號(hào)： | IA8044-PDW40I-01 |
| 廠商： | Innovasic Semiconductor |
| 英文描述： | SDLC COMMUNICATIONS CONTROLLER |
| 中文描述： | SDLC的通信控制器 |
| 文件頁數(shù)： | 32/49頁 |
| 文件大?。?/td> | 220K |
| 代理商： | IA8044-PDW40I-01 |
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IA8044/IA8344
Data Sheet
SDLC COMMUNICATIONS CONTROLLER
The FIFO register is actually three registers that make a three byte FIFO. These are used as
temporary storage between the eight bit shift register and the receive buffer when an information
field is received. This register is an ICE support register. FIFO is byte addressable.
FIFO
Bit: 7
6
5
4
FIFO*.7
FIFO*.6
FIFO*.5
FIFO*.4
* = 1, 2 or 3 for FIFO1, FIFO2, FIFO3 respectively.
SIU State Counter (SIUST):
The SIUST register indicates which state the SIU state machine is currently in. This in turn indicates
what task the SIU is performing or which field is expected next by the SIU. This register should not
be written to. This register is an ICE support register. SIUST is byte addressable.
SIUST
Bit: 7
6
5
4
SIUST .7
SIUST .6
SIUST .5
SIUST .4
Copyright
2003
innov
ASIC
The End of Obsolescence
ENG210010112-00
www.innovasic.com
Customer Support:
Page 32 of 49
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3
2
1
0
FIFO*.3
FIFO*.2
FIFO*.1
FIFO*.0
3
2
1
0
SIUST .3
SIUST .2
SIUST .1
SIUST .0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IA8044-PLC44I-01 | SDLC COMMUNICATIONS CONTROLLER |
| IA8344 | SDLC COMMUNICATIONS CONTROLLER |
| IA8344-PDW40I-01 | SDLC COMMUNICATIONS CONTROLLER |
| IA8344-PLC44I-01 | SDLC COMMUNICATIONS CONTROLLER |
| IA8X44 | SDLC COMMUNICATIONS CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IA8044-PLC44I-00 | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:SDLC COMMUNICATIONS CONTROLLER |
| IA8044-PLC44I-01 | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:SDLC COMMUNICATIONS CONTROLLER |
| IA8044R0146-PLC44I-01 | 制造商:INNOVASIC 功能描述:IA8044R0146 Series 192 B RAM 64 kB Flash 8 Bit Microcontroller - PLCC-44 |
| IA80C152 | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:UNIVERSAL COMMUNICATIONS CONTROLLER |
| IA80C152_10 | 制造商:INNOVASIC 制造商全稱:INNOVASIC 功能描述:Universal Communications Controller |
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