- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370806 > HYS72D32000GR-8-B (INFINEON TECHNOLOGIES AG) 2.5 V 184-pin Registered DDR-I SDRAM Modules PDF資料下載
參數(shù)資料
| 型號(hào)： | HYS72D32000GR-8-B |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
| 中文描述： | 2.5伏184針注冊的DDR - SDRAM內(nèi)存模塊我 |
| 文件頁數(shù)： | 10/25頁 |
| 文件大?。?/td> | 315K |
| 代理商： | HYS72D32000GR-8-B |
HYS 72Dxx0xxGR-7/8-A
Registered DDR-I SDRAM-Modules
INFINEON Technologies
10
2002-05-08 (revision 1.0)
Operating, Standby and Refresh Currents (PC1600)
Notes
5
IDD2P
mA
2,4
IDD2F
mA
2,4
IDD2
Q
mA
2,4
IDD3P
mA
2,4
IDD5
mA
1,4
mA
1,4
1.The module IDD values are calculated from the component IDD datasheet values as:
n * IDDx[component]
for single bank modules (n: number of components per module bank)
n * IDDx[component]+ n * IDD3N[component]
2.The module IDD values are calculated from the component IDD datasheet values as:
n * IDDx[component]
for single bank modules (n: number of components per module bank)
2 * n * IDDx[component]
for two bank modules (n: number of components per module bank)
3.D
Q
I
/
O (IDD
Q
) currents are not included into calculations:module IDD values will be measured differently depending on load conditions
4.DRAM component currents only: module IDD will be measured differently depending upon register and PLL operation currents
5.Test condition for maximum values:VDD = 2.7V ,Ta = 10°C
for two bank modules (n: number of components per module bank)
256MB
x72
1bank
-8
MA
X
512MB
x72
1bank
-8
MA
X
512MB
x72
2bank
-8
MA
X
1GB
x72
2bank
-8
MA
X
Precharge Power-Down Standby Current
:all banks idle
;
power-down
mode
;
CKE
<
= VIL MA
X;
tCK = tCK MIN
Precharge Floating Standby Current
:
/
CS
>
= VIH MIN, all banks idle
;
CKE
>
= VIH MIN
;
tCK = tCK MIN ,address and other control inputs
changing once per clock cycle, VIN = VREF for D
Q
, D
Q
S and DM.
270
630
mA
1, 3, 4
1
9
80
mA
270
99
0
630
1260
630
mA
1, 3, 4
2,4
mA
3240
2340
2700
99
0
Active Power-Down Standby Current
:one bank active
;
power-down
mode
;
CKE
<
= VIL MA
X;
tCK = tCK MIN
;
VIN = VREF for D
Q
, D
Q
S and
DM.
Active Standby Current
: one bank active
;
active
/
precharge
;
CS
>
= VIH
MIN
;
CKE
>
= VIH MIN
;
tRC = tRAS MA
X;
tCK = tCK MIN
;
D
Q
, DM,and
D
Q
S inputs changing twice per clock cycle
;
address and control inputs
changing once per clock cycle
Operating Current
: one bank active
;
Burst = 2
;
reads
;
continuous burst
;
address and control inputs changing once per clock cycle
;
50
%
ofdata
outputs changing on every clock edge
;
CL = 2 for DDR200, and
DDR266A, CL=3 for DDR333
;
tCK = tCK MIN
;
IOUT = 0mA
Operating Current
: one bank active
;
Burst = 2
;
writes
;
continuous burst
;
address and control inputs changing once per clock cycle
;
50
%
ofdata
outputs changing on every clock edge
;
CL = 2 for DDR200, and
DDR266A, CL=3 for DDR333
;
tCK = tCK MIN
Precharge Quiet Standby Current
:
/
CS
>
= VIH MIN,all banks idle
;
CKE
>
= VIH MIN
;
tCK = tCK MIN ,address and other control inputs
stable at
>
= VIH MIN or
<
= VIL MA
X;
VIN = VREF for D
Q
, D
Q
S and DM.
IDD0
Operating Current
: one bank
;
active
/
read
/
precharge
;
Burst = 4
;
Refer to the following page for detailed testconditions.
Operating Current
: one bank
;
active
/
precharge
;
tRC = tRC MIN
;
tCK =
tCK MIN
;
D
Q
, DM, and D
Q
S inputs changing once per clock cycle
;
address and control inputs changing once every two clock cycles
270
1800
1620
1305
13
9
5
270
3330
36
9
0
2,4
540
1260
540
27
9
0
2610
1,4
Symbol
Unit
Parameter
/
Condition
IDD4W
IDD4R
IDD3N
IDD1
315
1845
1665
1, 3, 4
5040
4050
54
54
108
mA
2520
mA
1350
1170
IDD7
IDD6
Operating Current
: four bank
;
four bank interleaving with BL=4
;
Refer to the following page for detailed testconditions.
2025
27
Self-Refresh Current
: CKE
<
= 0.2V
;
external clock on
;
tCK = tCK MIN
Auto-Refresh Current
:tRC = tRFC MIN, distributed refresh
135
315
135
4
9
5
630
2115
4230
1620
810
9
00
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72D64000GR-8-B | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D64020GR-8-B | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D32000GU-7-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS64D32300EU-7-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS64D16301GU-5-B | 184-Pin Unbuffered Dual-In-Line Memory Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72D32000GU-7-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?256MB (32Mx72) PC2100 1-bank? |
| HYS72D32000GU-7-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS72D32000GU-7F-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS72D32000GU-8-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?256MB (32Mx72) PC1600 1-bank End-of-Life? |
| HYS72D32000GU-8-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。